{ REG_KP_LOCK, 0x05 },
{ REG_CENTRAL_TAP, 0x09 },
REG16(REG_UNKNOWN_350, 0x3e80),
- { REG_REQ_CONSTELLATION, 0x00 },
{ REG_AUTO_RESET, 0x01 },
REG16(REG_UNKNOWN_24C, 0x0000),
REG16(REG_UNKNOWN_27C, 0x0000),
{ REG_SWEEP_STEP, 0x03 },
- { REG_REQ_CONSTELLATION, 0x0b },
{ REG_AGC_IF_TRI, 0x00 },
};
int ret;
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
const u32 dvb_rate = p->symbol_rate;
+ u8 u8tmp;
if (!state->has_dvbc)
return -EINVAL;
if (ret < 0)
return ret;
+ switch (p->modulation) {
+ case QPSK:
+ u8tmp = 0x3;
+ break;
+ case QAM_16:
+ u8tmp = 0x7;
+ break;
+ case QAM_32:
+ u8tmp = 0x8;
+ break;
+ case QAM_64:
+ u8tmp = 0x9;
+ break;
+ case QAM_128:
+ u8tmp = 0xa;
+ break;
+ case QAM_256:
+ default:
+ u8tmp = 0xb;
+ break;
+ }
+ ret = si2165_writereg8(state, REG_REQ_CONSTELLATION, u8tmp);
+ if (ret < 0)
+ return ret;
+
ret = si2165_writereg32(state, REG_LOCK_TIMEOUT, 0x007a1200);
if (ret < 0)
return ret;
FE_CAN_QAM_64 |
FE_CAN_QAM_128 |
FE_CAN_QAM_256 |
- FE_CAN_QAM_AUTO |
FE_CAN_GUARD_INTERVAL_AUTO |
FE_CAN_HIERARCHY_AUTO |
FE_CAN_MUTE_TS |