drm/sun4i: hdmi ddc clk: Fix size of m divider

m divider in DDC clock register is 4 bits wide. Fix that.

Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20200413095457.1176754-1-jernej.skrabec@siol.net

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 7ad3f06c127e711eaeaacc46469232b4c70f1ff1..00ca35f07ba5bc9b8a56a0e8a34ae8a3f6d736af 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -148,7 +148,7 @@
 #define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE      3
 
 #define SUN4I_HDMI_DDC_CLK_REG         0x528
-#define SUN4I_HDMI_DDC_CLK_M(m)                        (((m) & 0x7) << 3)
+#define SUN4I_HDMI_DDC_CLK_M(m)                        (((m) & 0xf) << 3)
 #define SUN4I_HDMI_DDC_CLK_N(n)                        ((n) & 0x7)
 
 #define SUN4I_HDMI_DDC_LINE_CTRL_REG   0x540

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
index 2ff780114106c328667a74b221429b31adf85319..12430b9d4e930f7e7b0536a5cabdf788ba182176 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
@@ -33,7 +33,7 @@ static unsigned long sun4i_ddc_calc_divider(unsigned long rate,
        unsigned long best_rate = 0;
        u8 best_m = 0, best_n = 0, _m, _n;
 
-       for (_m = 0; _m < 8; _m++) {
+       for (_m = 0; _m < 16; _m++) {
                for (_n = 0; _n < 8; _n++) {
                        unsigned long tmp_rate;