]> git.proxmox.com Git - mirror_ubuntu-disco-kernel.git/commitdiff
drm/radeon/kms: restore surface registers on resume.
authorDave Airlie <airlied@redhat.com>
Wed, 9 Dec 2009 04:15:38 +0000 (14:15 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 10 Dec 2009 05:25:45 +0000 (15:25 +1000)
On resume on my rv530 laptop surface cntl was left disabled, so
wierd stuff would happen with rendering to a tiled front buffer.

This checks if the surface regs are assigned to bos and reprograms
the surface registers on resume using the same path that clears
them all on init.

Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r420.c
drivers/gpu/drm/radeon/r520.c
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_object.c
drivers/gpu/drm/radeon/radeon_object.h
drivers/gpu/drm/radeon/rs400.c
drivers/gpu/drm/radeon/rs600.c
drivers/gpu/drm/radeon/rs690.c
drivers/gpu/drm/radeon/rv515.c

index b7baf16c11d7f144b81de1cc006657ad3b9d272f..824cc6480a0654125aae84fc9f5286cde4f3e27b 100644 (file)
@@ -3299,6 +3299,8 @@ int r100_resume(struct radeon_device *rdev)
        radeon_combios_asic_init(rdev->ddev);
        /* Resume clock after posting */
        r100_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return r100_startup(rdev);
 }
 
index 86065dcc1982a1f36c89aea06caf1b52c9e62e01..83378c39d0e3abf207aa60e80f910f34c5fc0162 100644 (file)
@@ -1250,6 +1250,8 @@ int r300_resume(struct radeon_device *rdev)
        radeon_combios_asic_init(rdev->ddev);
        /* Resume clock after posting */
        r300_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return r300_startup(rdev);
 }
 
index 162c3902fe69f7b618d031a6fa285ee1837807ab..c05a7270cf0c619fb6f20225c455bf58969ada19 100644 (file)
@@ -231,7 +231,8 @@ int r420_resume(struct radeon_device *rdev)
        }
        /* Resume clock after posting */
        r420_clock_resume(rdev);
-
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return r420_startup(rdev);
 }
 
index 788eef5c2a089556f34b6c1f0cdd35d765003363..0f3843b6dac7669991d4d638c6f002d7204a9054 100644 (file)
@@ -220,6 +220,8 @@ int r520_resume(struct radeon_device *rdev)
        atom_asic_init(rdev->mode_info.atom_context);
        /* Resume clock after posting */
        rv515_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return r520_startup(rdev);
 }
 
index 410859ee112f9dd52169ab14e098afa00a0e5144..02bcdb1240c0ffe73253ddf37a02dfa4546f1944 100644 (file)
@@ -44,10 +44,11 @@ void radeon_surface_init(struct radeon_device *rdev)
        if (rdev->family < CHIP_R600) {
                int i;
 
-               for (i = 0; i < 8; i++) {
-                       WREG32(RADEON_SURFACE0_INFO +
-                              i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO),
-                              0);
+               for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
+                       if (rdev->surface_regs[i].bo)
+                               radeon_bo_get_surface_reg(rdev->surface_regs[i].bo);
+                       else
+                               radeon_clear_surface_reg(rdev, i);
                }
                /* enable surfaces */
                WREG32(RADEON_SURFACE_CNTL, 0);
index ca172adfddb1baebdcea1c2237747f0e4ec68d43..2040937682fd3e0b554c635a73d9544e6d3430a6 100644 (file)
@@ -378,7 +378,7 @@ int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
        return ttm_fbdev_mmap(vma, &bo->tbo);
 }
 
-static int radeon_bo_get_surface_reg(struct radeon_bo *bo)
+int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 {
        struct radeon_device *rdev = bo->rdev;
        struct radeon_surface_reg *reg;
index e9da13077e2f1e4fa4d7ad3e9d00ed7537da2d88..f6b69c2c0d00cdec665946070405fe31b6005df4 100644 (file)
@@ -175,5 +175,5 @@ extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
                                        struct ttm_mem_reg *mem);
 extern void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
-
+extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
 #endif
index eda6d757b5c45f8a8ee3c9d51d037a1a1399b0f0..c1fcdddb6be68e7b4aa0ad56b5050679efb41bff 100644 (file)
@@ -430,6 +430,8 @@ int rs400_resume(struct radeon_device *rdev)
        radeon_combios_asic_init(rdev->ddev);
        /* Resume clock after posting */
        r300_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return rs400_startup(rdev);
 }
 
index fd5ab01f6ad10a1d6d9dd4c12a999d24cd348f65..4f8ea4260572d83ad562b034d4550b8214c4cd01 100644 (file)
@@ -586,6 +586,8 @@ int rs600_resume(struct radeon_device *rdev)
        atom_asic_init(rdev->mode_info.atom_context);
        /* Resume clock after posting */
        rv515_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return rs600_startup(rdev);
 }
 
index 98079367fbbacc104fae1878ee1b1cb2619d2257..1e22f52d6039ff67c369b3317a997d0881ac094d 100644 (file)
@@ -658,6 +658,8 @@ int rs690_resume(struct radeon_device *rdev)
        atom_asic_init(rdev->mode_info.atom_context);
        /* Resume clock after posting */
        rv515_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return rs690_startup(rdev);
 }
 
index 6aa4ad87222a0e0ec88b4e8fb9975e01afc9ce94..59632a506b46cc53ad6f74e8ca8f527662f6758c 100644 (file)
@@ -513,6 +513,8 @@ int rv515_resume(struct radeon_device *rdev)
        atom_asic_init(rdev->mode_info.atom_context);
        /* Resume clock after posting */
        rv515_clock_startup(rdev);
+       /* Initialize surface registers */
+       radeon_surface_init(rdev);
        return rv515_startup(rdev);
 }