};
-
typedef struct _ati_page_map {
unsigned long *real;
unsigned long __iomem *remapped;
ati_generic_private.num_tables = nr_tables;
ati_generic_private.gatt_pages = tables;
- if (retval != 0) ati_free_gatt_pages();
+ if (retval != 0)
+ ati_free_gatt_pages();
return retval;
}
ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
if (is_r200())
- pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
+ pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
else
pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
/* address to map too */
- /*
+ /*
pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
- */
+ */
writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
#ifdef CONFIG_PM
-static int agp_ati_resume(struct pci_dev *dev)
+static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state)
{
- pci_restore_state(dev);
+ pci_save_state(dev);
+ pci_set_power_state(dev, 3);
- return ati_configure();
+ return 0;
}
-static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state)
+static int agp_ati_resume(struct pci_dev *dev)
{
- pci_save_state(dev);
+ pci_set_power_state(dev, 0);
+ pci_restore_state(dev);
- return 0;
+ return ati_configure();
}
#endif
unsigned long __iomem *cur_gatt;
unsigned long addr;
- if (type != 0 || mem->type != 0) {
+ if (type != 0 || mem->type != 0)
return -EINVAL;
- }
+
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
bridge->dev = pdev;
bridge->capndx = cap_ptr;
-
- bridge->driver = &ati_generic_bridge;
+ bridge->driver = &ati_generic_bridge;
printk(KERN_INFO PFX "Detected Ati %s chipset\n",
devs[j].chipset_name);
.probe = agp_ati_probe,
.remove = agp_ati_remove,
#ifdef CONFIG_PM
- .resume = agp_ati_resume,
.suspend = agp_ati_suspend,
+ .resume = agp_ati_resume,
#endif
};
agp_put_bridge(bridge);
}
+#ifdef CONFIG_PM
+static int agp_nvidia_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+ pci_save_state (pdev);
+ pci_set_power_state (pdev, 3);
+
+ return 0;
+}
+
+static int agp_nvidia_resume(struct pci_dev *pdev)
+{
+ /* set power state 0 and restore PCI space */
+ pci_set_power_state (pdev, 0);
+ pci_restore_state(pdev);
+
+ /* reconfigure AGP hardware again */
+ nvidia_configure();
+
+ return 0;
+}
+#endif
+
+
static struct pci_device_id agp_nvidia_pci_table[] = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.id_table = agp_nvidia_pci_table,
.probe = agp_nvidia_probe,
.remove = agp_nvidia_remove,
+#ifdef CONFIG_PM
+ .suspend = agp_nvidia_suspend,
+ .resume = agp_nvidia_resume,
+#endif
};
static int __init agp_nvidia_init(void)