Merge branch 'uprobes-v7' of git://git.linaro.org/people/dave.long/linux into devel...

This patch series adds basic uprobes support to ARM. It is based on
patches developed earlier by Rabin Vincent. That approach of adding
hooks into the kprobes instruction parsing code was not well received.
This approach separates the ARM instruction parsing code in kprobes out
into a separate set of functions which can be used by both kprobes and
uprobes. Both kprobes and uprobes then provide their own semantic action
tables to process the results of the parsing.

diff --combined arch/arm/Kconfig
index 41266af5dfc8836e2cb7033833192f9b5baa238a,4d05bb93714abddf3ed5b8c1c05a146a4e3e0475..fac6890b315da5df38163f4fcc000c81933de99e
--- 1/arch/arm/Kconfig
--- 2/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -207,6 -207,9 +207,9 @@@ config ZONE_DM
  config NEED_DMA_MAP_STATE
         def_bool y
  
+ config ARCH_SUPPORTS_UPROBES
+       def_bool y
+ 
  config ARCH_HAS_DMA_SET_COHERENT_MASK
        bool
  
@@@ -2270,7 -2273,7 +2273,7 @@@ source "kernel/power/Kconfig
  config ARCH_SUSPEND_POSSIBLE
        depends on !ARCH_S5PC100
        depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
 -              CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
 +              CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
        def_bool y
  
  config ARM_CPU_SUSPEND

diff --combined arch/arm/include/asm/ptrace.h
index 627a03ebb987e7b2ef01c8d330918f8c6a52a0fe,ee688b0a13c309ab90b00d6ef4fd650c51dc1705..c877654fe3bf680f51d12bd9f2c7b3154454742b
--- 1/arch/arm/include/asm/ptrace.h
--- 2/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@@ -27,13 -27,9 +27,13 @@@ struct pt_regs 
  #define thumb_mode(regs) (0)
  #endif
  
 +#ifndef CONFIG_CPU_V7M
  #define isa_mode(regs) \
 -      ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \
 -       (((regs)->ARM_cpsr & PSR_T_BIT) >> 5))
 +      ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
 +       (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
 +#else
 +#define isa_mode(regs) 1 /* Thumb */
 +#endif
  
  #define processor_mode(regs) \
        ((regs)->ARM_cpsr & MODE_MASK)
@@@ -84,6 -80,12 +84,12 @@@ static inline long regs_return_value(st
  
  #define instruction_pointer(regs)     (regs)->ARM_pc
  
+ static inline void instruction_pointer_set(struct pt_regs *regs,
+                                          unsigned long val)
+ {
+       instruction_pointer(regs) = val;
+ }
+ 
  #ifdef CONFIG_SMP
  extern unsigned long profile_pc(struct pt_regs *regs);
  #else