]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commitdiff
clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
authorTony Lindgren <tony@atomide.com>
Thu, 19 Nov 2020 12:24:29 +0000 (14:24 +0200)
committerTony Lindgren <tony@atomide.com>
Thu, 19 Nov 2020 13:09:00 +0000 (15:09 +0200)
Similar to what we've done for IPU and DSP let's ignore the status bit
for the IVA clkctrl register.

The clkctrl status won't change unless the related rstctrl is deasserted,
and the rstctrl status won't change unless the clkctrl is enabled.

Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
drivers/clk/ti/clk-7xx.c
include/dt-bindings/clock/dra7.h

index 4e27f88062e7b97c2cb79c347b038c763c6129ce..8b9118ccd4cd1905742fed37b2743d2ce490c3c4 100644 (file)
@@ -252,6 +252,12 @@ static const struct omap_clkctrl_reg_data dra7_l3instr_clkctrl_regs[] __initcons
        { 0 },
 };
 
+static const struct omap_clkctrl_reg_data dra7_iva_clkctrl_regs[] __initconst = {
+       { DRA7_IVA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_h12x2_ck" },
+       { DRA7_SL2IF_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h12x2_ck" },
+       { 0 },
+};
+
 static const char * const dra7_dss_dss_clk_parents[] __initconst = {
        "dpll_per_h12x2_ck",
        NULL,
@@ -827,6 +833,7 @@ const struct omap_clkctrl_data dra7_clkctrl_data[] __initconst = {
        { 0x4a008c00, dra7_atl_clkctrl_regs },
        { 0x4a008d20, dra7_l4cfg_clkctrl_regs },
        { 0x4a008e20, dra7_l3instr_clkctrl_regs },
+       { 0x4a008f20, dra7_iva_clkctrl_regs },
        { 0x4a009020, dra7_cam_clkctrl_regs },
        { 0x4a009120, dra7_dss_clkctrl_regs },
        { 0x4a009220, dra7_gpu_clkctrl_regs },
index 5ec4137231e305acfc575904fb8b575f8f3645b7..7d57063b8a6518a2b51fe979fc969f5d7521c217 100644 (file)
 #define DRA7_L3_MAIN_2_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
 #define DRA7_L3_INSTR_CLKCTRL  DRA7_CLKCTRL_INDEX(0x28)
 
+/* iva clocks */
+#define DRA7_IVA_CLKCTRL       DRA7_CLKCTRL_INDEX(0x20)
+#define DRA7_SL2IF_CLKCTRL     DRA7_CLKCTRL_INDEX(0x28)
+
 /* dss clocks */
 #define DRA7_DSS_CORE_CLKCTRL  DRA7_CLKCTRL_INDEX(0x20)
 #define DRA7_BB2D_CLKCTRL      DRA7_CLKCTRL_INDEX(0x30)