arm64: dts: apq8096-db820c: enable bluetooth node

Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.

Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
index 24552f19b3fad5d3a66b9171fcdd2fe5c4ec9d97..6a573875d45ace01ddf3f916234cd5487870230b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi
@@ -36,4 +36,30 @@
                        drive-strength = <2>;   /* 2 MA */
                };
        };
+
+       blsp1_uart1_default: blsp1_uart1_default {
+               mux {
+                       pins = "gpio41", "gpio42", "gpio43", "gpio44";
+                       function = "blsp_uart2";
+               };
+
+               config {
+                       pins = "gpio41", "gpio42", "gpio43", "gpio44";
+                       drive-strength = <16>;
+                       bias-disable;
+               };
+       };
+
+       blsp1_uart1_sleep: blsp1_uart1_sleep {
+               mux {
+                       pins = "gpio41", "gpio42", "gpio43", "gpio44";
+                       function = "gpio";
+               };
+
+               config {
+                       pins = "gpio41", "gpio42", "gpio43", "gpio44";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+       };
 };

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
index 5d50f45c4df738ec5ccadaf0d7e62f35aa2367be..6167af9556599ad3f019bd2696905bc9e64f3b76 100644 (file)
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi
@@ -48,6 +48,16 @@
                };
        };
 
+       divclk4_pin_a: divclk4 {
+               pinconf {
+                       pins = "gpio18";
+                       function = PMIC_GPIO_FUNC_FUNC2;
+
+                       bias-disable;
+                       power-source = <PM8994_GPIO_S4>;
+               };
+       };
+
        usb3_vbus_det_gpio: pm8996_gpio22 {
                pinconf {
                        pins = "gpio22";

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index ec5e6eee0a7ad11b7d13441ff8d59d102b6382ed..4b8bb026346edb17ed2bc3c9b35790f5f99ec059 100644 (file)
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,6 +23,7 @@
        aliases {
                serial0 = &blsp2_uart1;
                serial1 = &blsp2_uart2;
+               serial2 = &blsp1_uart1;
                i2c0    = &blsp1_i2c2;
                i2c1    = &blsp2_i2c1;
                i2c2    = &blsp2_i2c0;
@@ -34,7 +35,36 @@
                stdout-path = "serial0:115200n8";
        };
 
+       clocks {
+               divclk4: divclk4 {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+                       clock-output-names = "divclk4";
+
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&divclk4_pin_a>;
+               };
+       };
+
        soc {
+               serial@7570000 {
+                       label = "BT-UART";
+                       status = "okay";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&blsp1_uart1_default>;
+                       pinctrl-1 = <&blsp1_uart1_sleep>;
+
+                       bluetooth {
+                               compatible = "qcom,qca6174-bt";
+
+                               /* bt_disable_n gpio */
+                               enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
+
+                               clocks = <&divclk4>;
+                       };
+               };
+
                serial@75b0000 {
                        label = "LS-UART1";
                        status = "okay";

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 410ae787ebb4de7c6db1ca8329240e718438d483..f8e49d0b468123f75251d7f975a42d65547bd373 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -419,6 +419,16 @@
                        #clock-cells = <1>;
                };
 
+               blsp1_uart1: serial@7570000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0x07570000 0x1000>;
+                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       status = "disabled";
+               };
+
                blsp1_spi0: spi@7575000 {
                        compatible = "qcom,spi-qup-v2.2.1";
                        reg = <0x07575000 0x600>;