{
TriCoreCPU *cpu = TRICORE_CPU(obj);
- set_feature(&cpu->env, TRICORE_FEATURE_13);
+ set_feature(&cpu->env, TRICORE_FEATURE_131);
}
static void aurix_initfn(Object *obj)
int64_t t1 = extract64(r1, 0, 32);
int64_t t2 = extract64(r2, 0, 32);
int64_t result = t1 * t2;
+
return suov32(env, result);
}
tcg_gen_and_tl(temp, temp, mask);
tcg_gen_or_tl(cpu_PSW_SAV, temp, cpu_PSW_SAV);
/* write back result */
- tcg_gen_movcond_tl(cond, r3, r4, t0, result, r3);
+ tcg_gen_movcond_tl(cond, r3, r4, t0, result, r1);
tcg_temp_free(t0);
tcg_temp_free(temp);
case OPC2_32_RCR_SEL:
temp = tcg_const_i32(0);
temp2 = tcg_const_i32(const9);
- tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr_d[r3], cpu_gpr_d[r4], temp,
+ tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr_d[r4], cpu_gpr_d[r3], temp,
cpu_gpr_d[r1], temp2);
tcg_temp_free(temp);
tcg_temp_free(temp2);
case OPC2_32_RCR_SELN:
temp = tcg_const_i32(0);
temp2 = tcg_const_i32(const9);
- tcg_gen_movcond_tl(TCG_COND_EQ, cpu_gpr_d[r3], cpu_gpr_d[r4], temp,
+ tcg_gen_movcond_tl(TCG_COND_EQ, cpu_gpr_d[r4], cpu_gpr_d[r3], temp,
cpu_gpr_d[r1], temp2);
tcg_temp_free(temp);
tcg_temp_free(temp2);