tty: serial: lpuart: disable flow control while waiting for the transmit engine to...

BugLink: https://bugs.launchpad.net/bugs/1991840
commit d5a2e0834364377a5d5a2fff1890a0b3f0bafd1f upstream.

When the user initializes the uart port, and waits for the transmit
engine to complete in lpuart32_set_termios(), if the UART TX fifo has
dirty data and the UARTMODIR enable the flow control, the TX fifo may
never be empty. So here we should disable the flow control first to make
sure the transmit engin can complete.

Fixes: 380c966c093e ("tty: serial: fsl_lpuart: add 32-bit register interface support")
Cc: stable <stable@kernel.org>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20220821101527.10066-1-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 127dd937ee51bb4c79b1ac9600bf6153ce20c37a..bf11ffafcad53e87f738c9ffcec9bedb5ca09bd2 100644 (file)
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -2203,6 +2203,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
        uart_update_timeout(port, termios->c_cflag, baud);
 
        /* wait transmit engin complete */
+       lpuart32_write(&sport->port, 0, UARTMODIR);
        lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
 
        /* disable transmit and receive */