]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
powerpc/boot/dts: Remove leading 0x and 0s from bindings notation
authorMathieu Malaterre <malat@debian.org>
Thu, 14 Dec 2017 16:54:00 +0000 (17:54 +0100)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 21 Jan 2018 12:37:45 +0000 (23:37 +1100)
Improve the DTS files by removing all the leading "0x" and zeros to
fix the following dtc warnings:

  Warning (unit_address_format): Node /XXX unit name should not have leading "0x"

and:

  Warning (unit_address_format): Node /XXX unit name should not have leading 0s

Converted using the following command:

  find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -E -i -e "s/@0x([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" -e "s/@0+([0-9a-fA-F\.]+)\s?\{/@\L\1 \{/g" {} +

For simplicity, two sed expressions were used to solve each warnings
separately.

To make the regex expression more robust a few other issues were
resolved, namely setting unit-address to lower case, and adding a
whitespace before the the opening curly brace:

  https://elinux.org/Device_Tree_Linux#Linux_conventions

This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove
leading 0x from bindings notation")

Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
26 files changed:
arch/powerpc/boot/dts/a3m071.dts
arch/powerpc/boot/dts/akebono.dts
arch/powerpc/boot/dts/c2k.dts
arch/powerpc/boot/dts/currituck.dts
arch/powerpc/boot/dts/fsl/mpc8568mds.dts
arch/powerpc/boot/dts/fsl/mpc8569mds.dts
arch/powerpc/boot/dts/fsl/p1021mds.dts
arch/powerpc/boot/dts/fsl/p1025rdb.dtsi
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dts
arch/powerpc/boot/dts/fsl/p1025twr.dtsi
arch/powerpc/boot/dts/fsl/t1040rdb.dts
arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
arch/powerpc/boot/dts/fsl/t1042rdb.dts
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
arch/powerpc/boot/dts/fsp2.dts
arch/powerpc/boot/dts/gamecube.dts
arch/powerpc/boot/dts/haleakala.dts
arch/powerpc/boot/dts/kilauea.dts
arch/powerpc/boot/dts/kmeter1.dts
arch/powerpc/boot/dts/makalu.dts
arch/powerpc/boot/dts/mpc832x_mds.dts
arch/powerpc/boot/dts/mpc832x_rdb.dts
arch/powerpc/boot/dts/mpc836x_mds.dts
arch/powerpc/boot/dts/sbc8548-altflash.dts
arch/powerpc/boot/dts/sbc8548.dts
arch/powerpc/boot/dts/wii.dts

index bf81b8f9704c9c8a094e78ab8c296758a0eab366..187ce458d03a802751da4a5dc41f594660295164 100644 (file)
                        reg = <0 0x0 0x02000000>;
                        compatible = "cfi-flash";
                        bank-width = <2>;
-                       partition@0x0 {
+                       partition@0 {
                                label = "u-boot";
                                reg = <0x00000000 0x00040000>;
                                read-only;
                        };
-                       partition@0x00040000 {
+                       partition@40000 {
                                label = "env";
                                reg = <0x00040000 0x00020000>;
                        };
-                       partition@0x00060000 {
+                       partition@60000 {
                                label = "dtb";
                                reg = <0x00060000 0x00020000>;
                        };
-                       partition@0x00080000 {
+                       partition@80000 {
                                label = "kernel";
                                reg = <0x00080000 0x00500000>;
                        };
-                       partition@0x00580000 {
+                       partition@580000 {
                                label = "root";
                                reg = <0x00580000 0x00A80000>;
                        };
index e61d5dc598c115b5aa5f8678d4e0b90be5bf7b81..746779202a122b3b504a8c751eff8ba7269f18ce 100644 (file)
                                interrupts = <39 2>;
                        };
 
-                       IIC0: i2c@00000000 {
+                       IIC0: i2c@0 {
                                compatible = "ibm,iic-476gtr", "ibm,iic";
                                reg = <0x0 0x00000020>;
                                interrupt-parent = <&MPIC>;
                                };
                        };
 
-                       IIC1: i2c@00000100 {
+                       IIC1: i2c@100 {
                                compatible = "ibm,iic-476gtr", "ibm,iic";
                                reg = <0x100 0x00000020>;
                                interrupt-parent = <&MPIC>;
index 1e32903cb0a891391b846dd6ecc51c2b48dd69be..27f169e3ade947a769e74bb34c0d8e07acd5cec4 100644 (file)
                        >;
                };
 
-               cpu-error@0070 {
+               cpu-error@70 {
                        compatible = "marvell,mv64360-cpu-error";
                        reg = <0x0070 0x10 0x0128 0x28>;
                        interrupts = <3>;
                        interrupt-parent = <&PIC>;
                };
 
-               sram-ctrl@0380 {
+               sram-ctrl@380 {
                        compatible = "marvell,mv64360-sram-ctrl";
                        reg = <0x0380 0x80>;
                        interrupts = <13>;
                        interrupt-parent = <&PIC>;
                };
                /* Devices attached to the device controller */
-               devicebus@045c {
+               devicebus@45c {
                        #address-cells = <2>;
                        #size-cells = <1>;
                        compatible = "marvell,mv64306-devctrl";
index 4191e1850ea1719929eb80e97e81f90ab5400057..f2ad5815f08d7a241e89dc1c03bb6960448bd486 100644 (file)
                                reg = <0x50000000 0x4>;
                        };
 
-                       IIC0: i2c@00000000 {
+                       IIC0: i2c@0 {
                                compatible = "ibm,iic-currituck", "ibm,iic";
                                reg = <0x0 0x00000014>;
                                interrupt-parent = <&MPIC>;
index 01706a3396031e3a3f2398b1cb2be464736d5297..bc3e8039bdc7a2b0d492d24fcabf08ab463f17e9 100644 (file)
                par_io@e0100 {
                        num-ports = <7>;
 
-                       pio1: ucc_pin@01 {
+                       pio1: ucc_pin@1 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x4  0xa  0x1  0x0  0x2  0x0    /* TxD0 */
                                        0x1  0x1f  0x2  0x0  0x3  0x0>; /* GTX125 */
                        };
 
-                       pio2: ucc_pin@02 {
+                       pio2: ucc_pin@2 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x5  0xa 0x1  0x0  0x2  0x0   /* TxD0 */
 
                        /* These are the same PHYs as on
                         * gianfar's MDIO bus */
-                       qe_phy0: ethernet-phy@07 {
+                       qe_phy0: ethernet-phy@7 {
                                interrupt-parent = <&mpic>;
                                interrupts = <1 1 0 0>;
                                reg = <0x7>;
                        };
-                       qe_phy1: ethernet-phy@01 {
+                       qe_phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
                                interrupts = <2 1 0 0>;
                                reg = <0x1>;
                        };
-                       qe_phy2: ethernet-phy@02 {
+                       qe_phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
                                interrupts = <1 1 0 0>;
                                reg = <0x2>;
                        };
-                       qe_phy3: ethernet-phy@03 {
+                       qe_phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
                                interrupts = <2 1 0 0>;
                                reg = <0x3>;
index 76b2bd6f77422e16e4089e267cdb9e6c5c651efe..d8367ceddea6634d4bcbff613a21786cd7fe9f59 100644 (file)
                                gpio-controller;
                        };
 
-                       pio1: ucc_pin@01 {
+                       pio1: ucc_pin@1 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x2  0x1f 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                        0x2  0x14 0x1  0x0  0x2  0x0>;  /* ENET1_GTXCLK */
                        };
 
-                       pio2: ucc_pin@02 {
+                       pio2: ucc_pin@2 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x2  0x1f 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                        0x2  0x2 0x1  0x0  0x2  0x0>;   /* ENET2_GTXCLK */
                        };
 
-                       pio3: ucc_pin@03 {
+                       pio3: ucc_pin@3 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x2  0x1f 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                        0x2  0x19 0x1  0x0  0x2  0x0>;  /* ENET3_GTXCLK */
                        };
 
-                       pio4: ucc_pin@04 {
+                       pio4: ucc_pin@4 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x2  0x1f 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                        reg = <0x2120 0x18>;
                        compatible = "fsl,ucc-mdio";
 
-                       qe_phy0: ethernet-phy@07 {
+                       qe_phy0: ethernet-phy@7 {
                                interrupt-parent = <&mpic>;
                                interrupts = <1 1 0 0>;
                                reg = <0x7>;
                        };
-                       qe_phy1: ethernet-phy@01 {
+                       qe_phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
                                interrupts = <2 1 0 0>;
                                reg = <0x1>;
                        };
-                       qe_phy2: ethernet-phy@02 {
+                       qe_phy2: ethernet-phy@2 {
                                interrupt-parent = <&mpic>;
                                interrupts = <3 1 0 0>;
                                reg = <0x2>;
                        };
-                       qe_phy3: ethernet-phy@03 {
+                       qe_phy3: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
                                interrupts = <4 1 0 0>;
                                reg = <0x3>;
                        };
-                       qe_phy5: ethernet-phy@04 {
+                       qe_phy5: ethernet-phy@4 {
                                reg = <0x04>;
                        };
-                       qe_phy7: ethernet-phy@06 {
+                       qe_phy7: ethernet-phy@6 {
                                reg = <0x6>;
                        };
                        tbi1: tbi-phy@11 {
index 291454c75ddad117d1d4345d992116bff7cd3cfb..1047802f4d2acc6e98693102a373bf365b8b3436 100644 (file)
                        ranges = <0x0 0xe0100 0x60>;
                        device_type = "par_io";
                        num-ports = <3>;
-                       pio1: ucc_pin@01 {
+                       pio1: ucc_pin@1 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                        0x0  0x10 0x2  0x0  0x2  0x0>;    /* ENET1_COL */
                        };
 
-                       pio2: ucc_pin@02 {
+                       pio2: ucc_pin@2 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                interrupts = <4 1 0 0>;
                                reg = <0x0>;
                        };
-                       qe_phy1: ethernet-phy@03 {
+                       qe_phy1: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
                                interrupts = <5 1 0 0>;
                                reg = <0x3>;
index d44bb12debb01052e6d75ceaa60182c849f2101c..0a5434a631c326f02435d90a88c7bd33da8da7e0 100644 (file)
                ranges = <0x0 0xe0100 0x60>;
                device_type = "par_io";
                num-ports = <3>;
-               pio1: ucc_pin@01 {
+               pio1: ucc_pin@1 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                0x0  0x10 0x2  0x0  0x2  0x0>;    /* ENET1_COL */
                };
 
-               pio2: ucc_pin@02 {
+               pio2: ucc_pin@2 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                0x1  0x8  0x2  0x0  0x2  0x0>;    /* ENET5_RX_ER_SER5_CD_B */
                };
 
-               pio3: ucc_pin@03 {
+               pio3: ucc_pin@3 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x0  0x16 0x2  0x0  0x2  0x0    /* SER7_CD_B*/
                                0x0  0x15 0x1  0x0  0x2  0x0>;    /* SER7_TXD0*/
                };
 
-               pio4: ucc_pin@04 {
+               pio4: ucc_pin@4 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x1  0x0  0x2  0x0  0x2  0x0    /* SER3_CD_B*/
index b15acbaea34b5296816efa6ee5a6c02836c06233..ea33b57f8774304e7adecb842ab4793881cf1d18 100644 (file)
                                interrupts = <4 1 0 0>;
                                reg = <0x6>;
                        };
-                       qe_phy1: ethernet-phy@03 {
+                       qe_phy1: ethernet-phy@3 {
                                interrupt-parent = <&mpic>;
                                interrupts = <5 1 0 0>;
                                reg = <0x3>;
index 08816fb474f5d552dec09b381839bcf7278e221b..ab75b8f29ae23360deff65e1e2de5e35c2f04069 100644 (file)
                ranges = <0x0 0xe0100 0x60>;
                device_type = "par_io";
                num-ports = <3>;
-               pio1: ucc_pin@01 {
+               pio1: ucc_pin@1 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                0x0  0x10 0x2  0x0  0x2  0x0>;    /* ENET1_COL */
                };
 
-               pio2: ucc_pin@02 {
+               pio2: ucc_pin@2 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                0x1  0x8  0x2  0x0  0x2  0x0>;    /* ENET5_RX_ER_SER5_CD_B */
                };
 
-               pio3: ucc_pin@03 {
+               pio3: ucc_pin@3 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x0  0x16 0x2  0x0  0x2  0x0    /* SER7_CD_B*/
                                0x0  0x15 0x1  0x0  0x2  0x0>;    /* SER7_TXD0*/
                };
 
-               pio4: ucc_pin@04 {
+               pio4: ucc_pin@4 {
                        pio-map = <
                /* port  pin  dir  open_drain  assignment  has_irq */
                                0x1  0x0  0x2  0x0  0x2  0x0    /* SER3_CD_B*/
index 621f2c6ee6ad51829f764f103e9f177079c46ed4..65ff34c4902569650fa2957f1fd62e2514b84eef 100644 (file)
@@ -61,7 +61,7 @@
                        };
 
                        mdio@fc000 {
-                               phy_sgmii_2: ethernet-phy@03 {
+                               phy_sgmii_2: ethernet-phy@3 {
                                        reg = <0x03>;
                                };
                        };
index fcd2aeb5b8ac8279efdc81f30c6ecb785d6962b6..4fa15f48a4c39ed79b4960942a74f1d97bff8388 100644 (file)
                        };
 
                        mdio0: mdio@fc000 {
-                               phy_sgmii_0: ethernet-phy@02 {
+                               phy_sgmii_0: ethernet-phy@2 {
                                        reg = <0x02>;
                                };
 
-                               phy_sgmii_1: ethernet-phy@03 {
+                               phy_sgmii_1: ethernet-phy@3 {
                                        reg = <0x03>;
                                };
 
-                               phy_sgmii_2: ethernet-phy@01 {
+                               phy_sgmii_2: ethernet-phy@1 {
                                        reg = <0x01>;
                                };
 
-                               phy_rgmii_0: ethernet-phy@04 {
+                               phy_rgmii_0: ethernet-phy@4 {
                                        reg = <0x04>;
                                };
 
-                               phy_rgmii_1: ethernet-phy@05 {
+                               phy_rgmii_1: ethernet-phy@5 {
                                        reg = <0x05>;
                                };
                        };
index 2c138627b1b4344a7292e18144252363848fcb1e..3ebb712224cbe02e8990c4548a515aea6894fa72 100644 (file)
@@ -59,7 +59,7 @@
                        };
 
                        mdio@fc000 {
-                               phy_sgmii_2: ethernet-phy@03 {
+                               phy_sgmii_2: ethernet-phy@3 {
                                        reg = <0x03>;
                                };
                        };
index 5fdddbd2a62b29df17994e8b45e70e82c0e4d4f1..099a598c74c00dda112ace336ab970d6c4e709a9 100644 (file)
                        };
 
                        mdio0: mdio@fc000 {
-                               phy_sgmii_2: ethernet-phy@03 {
+                               phy_sgmii_2: ethernet-phy@3 {
                                        reg = <0x03>;
                                };
 
-                               phy_rgmii_0: ethernet-phy@01 {
+                               phy_rgmii_0: ethernet-phy@1 {
                                        reg = <0x01>;
                                };
 
-                               phy_rgmii_1: ethernet-phy@02 {
+                               phy_rgmii_1: ethernet-phy@2 {
                                        reg = <0x02>;
                                };
                        };
index f10a64aeb83bd64046b0147f33e9a71baf174f18..6560283c5aecd55b48671bffd1e1567e261cc619 100644 (file)
                        };
                };
 
-               OHCI1: ohci@02040000 {
+               OHCI1: ohci@2040000 {
                        compatible = "ohci-le";
                        reg = <0x02040000 0xa0>;
                        interrupt-parent = <&UIC1_3>;
                        interrupts = <28 0x8 29 0x8>;
                };
 
-               OHCI2: ohci@02080000 {
+               OHCI2: ohci@2080000 {
                        compatible = "ohci-le";
                        reg = <0x02080000 0xa0>;
                        interrupt-parent = <&UIC1_3>;
                        interrupts = <30 0x8 31 0x8>;
                };
 
-               EHCI: ehci@02000000 {
+               EHCI: ehci@2000000 {
                        compatible = "usb-ehci";
                        reg = <0x02000000 0xa4>;
                        interrupt-parent = <&UIC1_3>;
index ef3be0e58b028270a23f074f4afd8a12424fff19..58d06c9ee08b806793e96ce5005ea38b12fe902d 100644 (file)
                ranges = <0x0c000000 0x0c000000 0x00010000>;
                interrupt-parent = <&PIC>;
 
-               video@0c002000 {
+               video@c002000 {
                        compatible = "nintendo,flipper-vi";
                        reg = <0x0c002000 0x100>;
                        interrupts = <8>;
                };
 
-               processor-interface@0c003000 {
+               processor-interface@c003000 {
                        compatible = "nintendo,flipper-pi";
                        reg = <0x0c003000 0x100>;
 
@@ -71,7 +71,7 @@
                        };
                };
 
-               dsp@0c005000 {
+               dsp@c005000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "nintendo,flipper-dsp";
                        };
                };
 
-               disk@0c006000 {
+               disk@c006000 {
                        compatible = "nintendo,flipper-di";
                        reg = <0x0c006000 0x40>;
                        interrupts = <2>;
                };
 
-               audio@0c006c00 {
+               audio@c006c00 {
                        compatible = "nintendo,flipper-ai";
                        reg = <0x0c006c00 0x20>;
                        interrupts = <6>;
                };
 
-               gamepad-controller@0c006400 {
+               gamepad-controller@c006400 {
                        compatible = "nintendo,flipper-si";
                        reg = <0x0c006400 0x100>;
                        interrupts = <3>;
                };
 
                /* External Interface bus */
-               exi@0c006800 {
+               exi@c006800 {
                        compatible = "nintendo,flipper-exi";
                        reg = <0x0c006800 0x40>;
                        virtual-reg = <0x0c006800>;
index 2b256694eca6b1c48d63dd31f3ca532eb8b741c8..cb16dad43c9223a925b9f3c912b10ad636f547bb 100644 (file)
                        };
                };
 
-               PCIE0: pciex@0a0000000 {
+               PCIE0: pciex@a0000000 {
                        device_type = "pci";
                        #interrupt-cells = <1>;
                        #size-cells = <2>;
index 5ba7f01e2a297878251001d427bf498bdd94397c..2a3413221cc1f35150a36637449cb7b8f6ad763a 100644 (file)
                        };
                };
 
-               PCIE0: pciex@0a0000000 {
+               PCIE0: pciex@a0000000 {
                        device_type = "pci";
                        #interrupt-cells = <1>;
                        #size-cells = <2>;
                                0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
                };
 
-               PCIE1: pciex@0c0000000 {
+               PCIE1: pciex@c0000000 {
                        device_type = "pci";
                        #interrupt-cells = <1>;
                        #size-cells = <2>;
index 983aee185793282529c7fcd050808d6c731104f0..9fa33d9ba966d22bc4c2e2dd956f3e12c10f1bcf 100644 (file)
                                compatible = "fsl,ucc-mdio";
 
                                /* Piggy2 (UCC4, MDIO 0x00, RMII) */
-                               phy_piggy2: ethernet-phy@00 {
+                               phy_piggy2: ethernet-phy@0 {
                                        reg = <0x0>;
                                };
 
                                /* Eth-1 (UCC5, MDIO 0x08, RMII) */
-                               phy_eth1: ethernet-phy@08 {
+                               phy_eth1: ethernet-phy@8 {
                                        reg = <0x08>;
                                };
 
                                /* Eth-2 (UCC6, MDIO 0x09, RMII) */
-                               phy_eth2: ethernet-phy@09 {
+                               phy_eth2: ethernet-phy@9 {
                                        reg = <0x09>;
                                };
 
                                /* Eth-3 (UCC7, MDIO 0x0a, RMII) */
-                               phy_eth3: ethernet-phy@0a {
+                               phy_eth3: ethernet-phy@a {
                                        reg = <0x0a>;
                                };
 
                                /* Eth-4 (UCC8, MDIO 0x0b, RMII) */
-                               phy_eth4: ethernet-phy@0b {
+                               phy_eth4: ethernet-phy@b {
                                        reg = <0x0b>;
                                };
 
index 63d48b632c84c8f3a2c9382eaddf578b0791338e..bf8fe16293924a15c5047c86cd924cb13cce8109 100644 (file)
                        };
                };
 
-               PCIE0: pciex@0a0000000 {
+               PCIE0: pciex@a0000000 {
                        device_type = "pci";
                        #interrupt-cells = <1>;
                        #size-cells = <2>;
                                0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
                };
 
-               PCIE1: pciex@0c0000000 {
+               PCIE1: pciex@c0000000 {
                        device_type = "pci";
                        #interrupt-cells = <1>;
                        #size-cells = <2>;
index 0793cdf0d46e49a8bef08ffd0d29e537a947c9d4..49c7d657118aac0fb57fa37f819f3c786f77f17f 100644 (file)
                        device_type = "par_io";
                        num-ports = <7>;
 
-                       pio3: ucc_pin@03 {
+                       pio3: ucc_pin@3 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        3  4  3  0  2  0  /* MDIO */
                                        1 12  1  0  1  0        /* TX_EN */
                                        1 13  2  0  1  0>;      /* CRS */
                        };
-                       pio4: ucc_pin@04 {
+                       pio4: ucc_pin@4 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        3 31  2  0  1  0        /* RX_CLK (CLK7) */
                                        1 30  1  0  1  0        /* TX_EN */
                                        1 31  2  0  1  0>;      /* CRS */
                        };
-                       pio5: ucc_pin@05 {
+                       pio5: ucc_pin@5 {
                                pio-map = <
                                /*
                                 *                    open       has
                        reg = <0x2320 0x18>;
                        compatible = "fsl,ucc-mdio";
 
-                       phy3: ethernet-phy@03 {
+                       phy3: ethernet-phy@3 {
                                interrupt-parent = <&ipic>;
                                interrupts = <17 0x8>;
                                reg = <0x3>;
                        };
-                       phy4: ethernet-phy@04 {
+                       phy4: ethernet-phy@4 {
                                interrupt-parent = <&ipic>;
                                interrupts = <18 0x8>;
                                reg = <0x4>;
index 91df1eb166673c8e9be80934c3fb2be1a8e54381..647cae14c16dfb8464320af7c621c4b4b4b020ad 100644 (file)
                                gpio-controller;
                        };
 
-                       ucc2pio:ucc_pin@02 {
+                       ucc2pio:ucc_pin@2 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        3  4  3  0  2  0        /* MDIO */
                                        0 30  1  0  1  0        /* TX_EN */
                                        0 31  2  0  1  0>;      /* CRS */
                        };
-                       ucc3pio:ucc_pin@03 {
+                       ucc3pio:ucc_pin@3 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0 13  2  0  1  0        /* RX_CLK (CLK9) */
                        reg = <0x3120 0x18>;
                        compatible = "fsl,ucc-mdio";
 
-                       phy00:ethernet-phy@00 {
+                       phy00:ethernet-phy@0 {
                                interrupt-parent = <&ipic>;
                                interrupts = <0>;
                                reg = <0x0>;
                        };
-                       phy04:ethernet-phy@04 {
+                       phy04:ethernet-phy@4 {
                                interrupt-parent = <&ipic>;
                                interrupts = <0>;
                                reg = <0x4>;
index ecb6ccd3a6aad7e2dc03daf6a577b7a6fb76b4e4..539fd9f72eda804ef2d524912bb7f7cbac05d1bf 100644 (file)
                                gpio-controller;
                        };
 
-                       pio1: ucc_pin@01 {
+                       pio1: ucc_pin@1 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0  3  1  0  1  0        /* TxD0 */
                                        2  9  1  0  3  0        /* GTX_CLK - CLK10 */
                                        2  8  2  0  1  0>;      /* GTX125 - CLK9 */
                        };
-                       pio2: ucc_pin@02 {
+                       pio2: ucc_pin@2 {
                                pio-map = <
                        /* port  pin  dir  open_drain  assignment  has_irq */
                                        0  17 1  0  1  0   /* TxD0 */
                        reg = <0x2120 0x18>;
                        compatible = "fsl,ucc-mdio";
 
-                       phy0: ethernet-phy@00 {
+                       phy0: ethernet-phy@0 {
                                interrupt-parent = <&ipic>;
                                interrupts = <17 0x8>;
                                reg = <0x0>;
                        };
-                       phy1: ethernet-phy@01 {
+                       phy1: ethernet-phy@1 {
                                interrupt-parent = <&ipic>;
                                interrupts = <18 0x8>;
                                reg = <0x1>;
index 0b38a0defd2ce4ef607f7cae4390db36f6d8591b..8967a56adad4c5248b741c3d60361ab80fff69a3 100644 (file)
                        compatible = "intel,JS28F128", "cfi-flash";
                        bank-width = <4>;
                        device-width = <1>;
-                       partition@0x0 {
+                       partition@0 {
                                label = "space";
                                /* FC000000 -> FFEFFFFF */
                                reg = <0x00000000 0x03f00000>;
                        };
-                       partition@0x03f00000 {
+                       partition@3f00000 {
                                label = "bootloader";
                                /* FFF00000 -> FFFFFFFF */
                                reg = <0x03f00000 0x00100000>;
                        reg = <0x6 0x0 0x800000>;
                        bank-width = <1>;
                        device-width = <1>;
-                       partition@0x0 {
+                       partition@0 {
                                label = "space";
                                /* EF800000 -> EFF9FFFF */
                                reg = <0x00000000 0x007a0000>;
                        };
-                       partition@0x7a0000 {
+                       partition@7a0000 {
                                label = "bootloader";
                                /* EFFA0000 -> EFFFFFFF */
                                reg = <0x007a0000 0x00060000>;
index 1df2a0955668d280195cb79700bedc16f097ffdc..9bdb828a504e6f65ce593e993b28f5d636cec134 100644 (file)
                        reg = <0x0 0x0 0x800000>;
                        bank-width = <1>;
                        device-width = <1>;
-                       partition@0x0 {
+                       partition@0 {
                                label = "space";
                                /* FF800000 -> FFF9FFFF */
                                reg = <0x00000000 0x007a0000>;
                        };
-                       partition@0x7a0000 {
+                       partition@7a0000 {
                                label = "bootloader";
                                /* FFFA0000 -> FFFFFFFF */
                                reg = <0x007a0000 0x00060000>;
                        compatible = "intel,JS28F128", "cfi-flash";
                        bank-width = <4>;
                        device-width = <1>;
-                       partition@0x0 {
+                       partition@0 {
                                label = "space";
                                /* EC000000 -> EFEFFFFF */
                                reg = <0x00000000 0x03f00000>;
                        };
-                       partition@0x03f00000 {
+                       partition@3f00000 {
                                label = "bootloader";
                                /* EFF00000 -> EFFFFFFF */
                                reg = <0x03f00000 0x00100000>;
index 77528c9a8dbd4efa2ad5506304b814d05ab2935f..17a5babb098d426b54dc5eb01933c738b748b2c6 100644 (file)
                          0x0d800000 0x0d800000 0x00800000>;
                interrupt-parent = <&PIC0>;
 
-               video@0c002000 {
+               video@c002000 {
                        compatible = "nintendo,hollywood-vi",
                                        "nintendo,flipper-vi";
                        reg = <0x0c002000 0x100>;
                        interrupts = <8>;
                };
 
-               processor-interface@0c003000 {
+               processor-interface@c003000 {
                        compatible = "nintendo,hollywood-pi",
                                        "nintendo,flipper-pi";
                        reg = <0x0c003000 0x100>;
@@ -84,7 +84,7 @@
                        };
                };
 
-               dsp@0c005000 {
+               dsp@c005000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "nintendo,hollywood-dsp",
                        interrupts = <6>;
                };
 
-               gamepad-controller@0d006400 {
+               gamepad-controller@d006400 {
                        compatible = "nintendo,hollywood-si",
                                        "nintendo,flipper-si";
                        reg = <0x0d006400 0x100>;
                        interrupts = <3>;
                };
 
-               audio@0c006c00 {
+               audio@c006c00 {
                        compatible = "nintendo,hollywood-ai",
                                        "nintendo,flipper-ai";
                        reg = <0x0d006c00 0x20>;
                };
 
                /* External Interface bus */
-               exi@0d006800 {
+               exi@d006800 {
                        compatible = "nintendo,hollywood-exi",
                                        "nintendo,flipper-exi";
                        reg = <0x0d006800 0x40>;
                        interrupts = <4>;
                };
 
-               usb@0d040000 {
+               usb@d040000 {
                        compatible = "nintendo,hollywood-usb-ehci",
                                        "usb-ehci";
                        reg = <0x0d040000 0x100>;
                        interrupt-parent = <&PIC1>;
                };
 
-               usb@0d050000 {
+               usb@d050000 {
                        compatible = "nintendo,hollywood-usb-ohci",
                                        "usb-ohci";
                        reg = <0x0d050000 0x100>;
                        interrupt-parent = <&PIC1>;
                };
 
-               usb@0d060000 {
+               usb@d060000 {
                        compatible = "nintendo,hollywood-usb-ohci",
                                        "usb-ohci";
                        reg = <0x0d060000 0x100>;
                        interrupt-parent = <&PIC1>;
                };
 
-               sd@0d070000 {
+               sd@d070000 {
                        compatible = "nintendo,hollywood-sdhci",
                                        "sdhci";
                        reg = <0x0d070000 0x200>;
                        interrupt-parent = <&PIC1>;
                };
 
-               sdio@0d080000 {
+               sdio@d080000 {
                        compatible = "nintendo,hollywood-sdhci",
                                        "sdhci";
                        reg = <0x0d080000 0x200>;
                        interrupt-parent = <&PIC1>;
                };
 
-               ipc@0d000000 {
+               ipc@d000000 {
                        compatible = "nintendo,hollywood-ipc";
                        reg = <0x0d000000 0x10>;
                        interrupts = <30>;
                        interrupt-parent = <&PIC1>;
                };
 
-               PIC1: pic1@0d800030 {
+               PIC1: pic1@d800030 {
                        #interrupt-cells = <1>;
                        compatible = "nintendo,hollywood-pic";
                        reg = <0x0d800030 0x10>;
                        interrupts = <14>;
                };
 
-               GPIO: gpio@0d8000c0 {
+               GPIO: gpio@d8000c0 {
                        #gpio-cells = <2>;
                        compatible = "nintendo,hollywood-gpio";
                        reg = <0x0d8000c0 0x40>;
                        */
                };
 
-               control@0d800100 {
+               control@d800100 {
                        compatible = "nintendo,hollywood-control";
                        reg = <0x0d800100 0x300>;
                };
 
-               disk@0d806000 {
+               disk@d806000 {
                        compatible = "nintendo,hollywood-di";
                        reg = <0x0d806000 0x40>;
                        interrupts = <2>;