ARM: 5734/1: arm: fix compilation of entry-common.S for older CPUs

Commit 181f817eaaca4c1f introduced some new code to entry-common.S
Sadly, this new code uses 'bx' instruction which is available only on
ARMv5 and higher CPUs. This causes following compilation errors when
building kernel for StrongARM (ARMv4):

arch/arm/kernel/entry-common.S: Assembler messages:
arch/arm/kernel/entry-common.S:129: Error: selected processor does not
 support `bx ip'
arch/arm/kernel/entry-common.S:138: Error: selected processor does not
 support `bx ip'

Fix these errors by using 'mov pc' instead of 'bx'.

Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 807cfebb0f44486d5b19b7869cf3b155e630ac7e..825db52e558a03cc77a6cb945ae8bf93d1f54871 100644 (file)
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -126,7 +126,7 @@ ENTRY(__gnu_mcount_nc)
        cmp r0, r2
        bne gnu_trace
        ldmia sp!, {r0-r3, ip, lr}
-       bx ip
+       mov pc, ip
 
 gnu_trace:
        ldr r1, [sp, #20]                       @ lr of instrumented routine
@@ -135,7 +135,7 @@ gnu_trace:
        mov lr, pc
        mov pc, r2
        ldmia sp!, {r0-r3, ip, lr}
-       bx ip
+       mov pc, ip
 
 ENTRY(mcount)
        stmdb sp!, {r0-r3, lr}