The A/D FIFO uses two registers to get each analog data sample.
PCL818_FI_DATALO is the LSB of the data and PCL818_FI_DATAHI is
the MSB of the data. The current define for PCL818_FI_DATAHI is
incorrect and results in the LSB getting read twice.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
#define PCL818_FI_STATUS 25
/* R: one record from FIFO */
#define PCL818_FI_DATALO 23
-#define PCL818_FI_DATAHI 23
+#define PCL818_FI_DATAHI 24
/* type of interrupt handler */
#define INT_TYPE_AI1_INT 1