IB/hfi1: Do not override given pcie_pset value

During PCIe Gen 3 transistion, pcie_pset is read and might be overridden
to a default value(i.e. 255) in do_pcie_gen3_transition() routine.

If the pcie_pset value is overridden then this new value will be used
during initialization of next adapter on a different card.

Introducing a new local variable to avoid modification of pcie_pset

Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Bartlomiej Dudek <bartlomiej.dudek@intel.com>
Signed-off-by: Patel Jay P <jay.p.patel@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>

diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c
index 8c7e7a60b71584d5e587f6ef664cc773ab991991..83d66e862207c6f7a31ab5e7eac48a441b82e115 100644 (file)
--- a/drivers/infiniband/hw/hfi1/pcie.c
+++ b/drivers/infiniband/hw/hfi1/pcie.c
@@ -1034,6 +1034,7 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
        int do_retry, retry_count = 0;
        int intnum = 0;
        uint default_pset;
+       uint pset = pcie_pset;
        u16 target_vector, target_speed;
        u16 lnkctl2, vendor;
        u8 div;
@@ -1201,16 +1202,16 @@ retry:
         *
         * Set Gen3EqPsetReqVec, leave other fields 0.
         */
-       if (pcie_pset == UNSET_PSET)
-               pcie_pset = default_pset;
-       if (pcie_pset > 10) {   /* valid range is 0-10, inclusive */
+       if (pset == UNSET_PSET)
+               pset = default_pset;
+       if (pset > 10) {        /* valid range is 0-10, inclusive */
                dd_dev_err(dd, "%s: Invalid Eq Pset %u, setting to %d\n",
-                          __func__, pcie_pset, default_pset);
-               pcie_pset = default_pset;
+                          __func__, pset, default_pset);
+               pset = default_pset;
        }
-       dd_dev_info(dd, "%s: using EQ Pset %u\n", __func__, pcie_pset);
+       dd_dev_info(dd, "%s: using EQ Pset %u\n", __func__, pset);
        pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL106,
-                              ((1 << pcie_pset) <<
+                              ((1 << pset) <<
                        PCIE_CFG_REG_PL106_GEN3_EQ_PSET_REQ_VEC_SHIFT) |
                        PCIE_CFG_REG_PL106_GEN3_EQ_EVAL2MS_DISABLE_SMASK |
                        PCIE_CFG_REG_PL106_GEN3_EQ_PHASE23_EXIT_MODE_SMASK);
@@ -1240,10 +1241,10 @@ retry:
                /* apply static CTLE tunings */
                u8 pcie_dc, pcie_lf, pcie_hf, pcie_bw;
 
-               pcie_dc = ctle_tunings[pcie_pset][0];
-               pcie_lf = ctle_tunings[pcie_pset][1];
-               pcie_hf = ctle_tunings[pcie_pset][2];
-               pcie_bw = ctle_tunings[pcie_pset][3];
+               pcie_dc = ctle_tunings[pset][0];
+               pcie_lf = ctle_tunings[pset][1];
+               pcie_hf = ctle_tunings[pset][2];
+               pcie_bw = ctle_tunings[pset][3];
                write_gasket_interrupt(dd, intnum++, 0x0026, 0x0200 | pcie_dc);
                write_gasket_interrupt(dd, intnum++, 0x0026, 0x0100 | pcie_lf);
                write_gasket_interrupt(dd, intnum++, 0x0026, 0x0000 | pcie_hf);