cleanup

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@595 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index a93486cbe4a06265168d81197fdb6d3f965bb518..676e6ceae30307af1a91191201e235bb451109a4 100644 (file)
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -133,6 +133,8 @@
 #define CR4_TSD_MASK  (1 << 2)
 #define CR4_DE_MASK   (1 << 3)
 #define CR4_PSE_MASK  (1 << 4)
+#define CR4_PAE_MASK  (1 << 5)
+#define CR4_PGE_MASK  (1 << 7)
 
 #define PG_PRESENT_BIT 0
 #define PG_RW_BIT      1
@@ -309,6 +311,7 @@ typedef struct CPUX86State {
     int user_mode_only; /* user mode only simulation */
 
     /* soft mmu support */
+    uint32_t a20_mask;
     /* 0 = kernel, 1 = user */
     CPUTLBEntry tlb_read[2][CPU_TLB_SIZE];
     CPUTLBEntry tlb_write[2][CPU_TLB_SIZE];
@@ -396,13 +399,11 @@ void cpu_x86_frstor(CPUX86State *s, uint8_t *ptr, int data32);
 struct siginfo;
 int cpu_x86_signal_handler(int host_signum, struct siginfo *info, 
                            void *puc);
-
-/* MMU defines */
-void cpu_x86_init_mmu(CPUX86State *env);
-extern int a20_enabled;
-
 void cpu_x86_set_a20(CPUX86State *env, int a20_state);
 
+/* will be suppressed */
+void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
+
 /* used to debug */
 #define X86_DUMP_FPU  0x0001 /* dump FPU state too */
 #define X86_DUMP_CCOP 0x0002 /* dump qemu flag cache */