drm/i915/cnl: Cannonlake color init.

Cannonlake has same color setup as Geminilake.
Legacy color load luts doesn't work anymore on Cannonlake+.

Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499374873-2454-1-git-send-email-rodrigo.vivi@intel.com

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 04aaf553e3fa204624972e35886c2f7639ce7752..a1e6b696bcfa076059854b2c46c0f65e26f1adee 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -449,6 +449,7 @@ static const struct intel_device_info intel_cannonlake_info = {
        .gen = 10,
        .ddb_size = 1024,
        .has_csr = 1,
+       .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
 };
 
 /*

diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index 306c6b06b330bfc57f75a992c60468cb9d88e81c..f85d575559571f0a8fd02ecd34ed9dded6e5a9db 100644 (file)
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -615,7 +615,7 @@ void intel_color_init(struct drm_crtc *crtc)
                   IS_BROXTON(dev_priv)) {
                dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
                dev_priv->display.load_luts = broadwell_load_luts;
-       } else if (IS_GEMINILAKE(dev_priv)) {
+       } else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
                dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
                dev_priv->display.load_luts = glk_load_luts;
        } else {

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ede3c6c02ec5cec4c4307cecac30619d9056fcb2..9a3919b19413abae27070c34ac822825eefec93e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3311,7 +3311,7 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
 
        plane_ctl = PLANE_CTL_ENABLE;
 
-       if (!IS_GEMINILAKE(dev_priv)) {
+       if (!IS_GEMINILAKE(dev_priv) && !IS_CANNONLAKE(dev_priv)) {
                plane_ctl |=
                        PLANE_CTL_PIPE_GAMMA_ENABLE |
                        PLANE_CTL_PIPE_CSC_ENABLE |
@@ -3367,7 +3367,7 @@ static void skylake_update_primary_plane(struct intel_plane *plane,
 
        spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
 
-       if (IS_GEMINILAKE(dev_priv)) {
+       if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
                I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
                              PLANE_COLOR_PIPE_GAMMA_ENABLE |
                              PLANE_COLOR_PIPE_CSC_ENABLE |

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 0c650c2cbca8593636e8f04e64e3a61ed42d4234..94f9a1332dbf6e636d268964787a6195a879fa5d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -262,7 +262,7 @@ skl_update_plane(struct intel_plane *plane,
 
        spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
 
-       if (IS_GEMINILAKE(dev_priv)) {
+       if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
                I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
                              PLANE_COLOR_PIPE_GAMMA_ENABLE |
                              PLANE_COLOR_PIPE_CSC_ENABLE |