]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
drm/nouveau: inform userspace of new kernel subchannel requirements
authorBen Skeggs <bskeggs@redhat.com>
Wed, 21 Mar 2012 03:57:40 +0000 (13:57 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 22 Mar 2012 07:17:50 +0000 (17:17 +1000)
All available subchannels are now available for userspace to do with as it
pleases on NVC0+.

On all earlier chipsets, the kernel still uses a software object on subc 0
to implement the page flip completion method.  I hope to find some decent
way of addressing this too, but it's a tad tricker prior to fermi.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_channel.c
drivers/gpu/drm/nouveau/nouveau_dma.h

index 337e228629ed66860c1d919fa26992c18580c28a..44e6416d4a336054409a24e05bfe20c66c4c7d1a 100644 (file)
@@ -436,18 +436,11 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
        }
 
        if (dev_priv->card_type < NV_C0) {
-               init->subchan[0].handle = NvM2MF;
-               if (dev_priv->card_type < NV_50)
-                       init->subchan[0].grclass = 0x0039;
-               else
-                       init->subchan[0].grclass = 0x5039;
-               init->subchan[1].handle = NvSw;
-               init->subchan[1].grclass = NV_SW;
-               init->nr_subchan = 2;
-       } else {
-               init->subchan[0].handle  = 0x9039;
-               init->subchan[0].grclass = 0x9039;
+               init->subchan[0].handle = NvSw;
+               init->subchan[0].grclass = NV_SW;
                init->nr_subchan = 1;
+       } else {
+               init->nr_subchan = 0;
        }
 
        /* Named memory object area */
index 23d4edf992b7d20440eb53ce8273231ccfe487e1..bcf0fd9e313eb6fdc2db1e158cdecfb77cf1310d 100644 (file)
@@ -48,8 +48,8 @@ void nv50_dma_push(struct nouveau_channel *, struct nouveau_bo *,
 
 /* Hardcoded object assignments to subchannels (subchannel id). */
 enum {
-       NvSubM2MF       = 0,
-       NvSubSw         = 1,
+       NvSubSw         = 0,
+       NvSubM2MF       = 1,
        NvSub2D         = 2,
        NvSubCtxSurf2D  = 2,
        NvSubGdiRect    = 3,