ixgbe: Cleanup PCIe bus speed info

PCIe connections should be expressed as GT/s (GigaTransfers per second)
instead of the current Gb/s (Gigabits per second).  In addition, it is
incorrect because (due to PCIe gen 1 & 2 having a 20% overhead) the
actually data rate, when expressed in Gb/s, is only 80% of the rate of
GT/s.

Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index bd3d21d0185327dc0b86a480b47c99d8b3a4f378..eebb1921c66019aeaa3165be0b56100d8566caa1 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -7469,8 +7469,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
 
        /* print bus type/speed/width info */
        e_dev_info("(PCI Express:%s:%s) %pM\n",
-                  (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0Gb/s" :
-                   hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5Gb/s" :
+                  (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
+                   hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
                    "Unknown"),
                   (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
                    hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :