#define Rd { OP_R, d_mode }
#define Rm { OP_R, m_mode }
#define Ib { OP_I, b_mode }
-#define sIb { OP_sI, b_mode } /* sign extened byte */
+#define sIb { OP_sI, b_mode } /* sign extended byte */
#define Iv { OP_I, v_mode }
#define Iq { OP_I, q_mode }
#define Iv64 { OP_I64, v_mode }
names of the instruction format that you can find in the principals
of operation.
2) the last part of the definition (y in INSTR_x_y) gives you an idea
- which operands the binary represenation of the instruction has.
+ which operands the binary representation of the instruction has.
The meanings of the letters in y are:
a - access register
c - control register
m - mode field, 4 bit
0 - operand skipped.
The order of the letters reflects the layout of the format in
- storage and not the order of the paramaters of the instructions.
+ storage and not the order of the parameters of the instructions.
The use of the letters is not a 100% match with the PoP but it is
quite close.
with MMU disabled, ie guest effective == guest physical), it only
has access to a subset of memory and no IOs.
-PAPR provides a set of hypervisor calls to perform cachable or
-non-cachable accesses to any guest physical addresses that the
+PAPR provides a set of hypervisor calls to perform cacheable or
+non-cacheable accesses to any guest physical addresses that the
guest can use in order to access IO devices while in real mode.
This is typically used by the firmware running in the guest.
Now a little hack is needed. As we're still using the old QMP server we need
to add the new command to its internal dispatch table. This step won't be
required in the near future. Open the qmp-commands.hx file and add the
-following in the botton:
+following at the bottom:
{
.name = "hello-world",
OPLWriteReg(OPL,0x03,0); /* Timer2 */
OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
- /* reset OPerator paramater */
+ /* reset operator parameter */
for( c = 0 ; c < OPL->max_ch ; c++ )
{
OPL_CH *CH = &OPL->P_CH[c];
return ret;
}
-/* disconnect a GPIO ouput, returning the disconnected input (if any) */
+/* disconnect a GPIO output, returning the disconnected input (if any) */
static qemu_irq qdev_disconnect_gpio_out_named(DeviceState *dev,
const char *name, int n)
s->count = 16;
if ((s->regs[0] & 0xff) == 0) {
- /* 25 degrees celcius. */
+ /* 25 degrees celsius. */
s->shiftreg = 0x0b9f;
} else if ((s->regs[0] & 0xff) == 0xff) {
/* Sensor ID, 0x8100 LM70. */
/*
* use ssd.lock to protect render_update_cookie_num.
* qxl_render_update is called by io thread or vcpu thread, and the completion
- * callbacks are called by spice_server thread, defering to bh called from the
+ * callbacks are called by spice_server thread, deferring to bh called from the
* io thread.
*/
void qxl_render_update(PCIQXLDevice *qxl)
};
/*
- * Helper calls to extract info from desriptors and other trivial
+ * Helper calls to extract info from descriptors and other trivial
* state from regs.
*/
static inline int stream_desc_sof(struct SDesc *d)
}
};
-/* Returns an array 5 ouput slots. */
+/* Returns an array of 5 output slots. */
void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode)
{
gamepad_state *s;
}
/*
- * Allocate block of consequtive IRQs, returns a number of the first.
+ * Allocate block of consecutive IRQs, and return the number of the first IRQ in the block.
* If align==true, aligns the first IRQ number to num.
*/
int xics_alloc_block(XICSState *icp, int src, int num, bool lsi, bool align)
etsec->need_flush = false;
ret = etsec_rx_ring_write(etsec, buf, size);
if (ret == 0) {
- /* The packet will be queued, let's flush it when buffer is avilable
+ /* The packet will be queued, let's flush it when buffer is available
* again. */
etsec->need_flush = true;
}
int32_t fifo_pos;
int32_t fifo_len;
/* The linux 2.6.21 driver is buggy, and misbehaves if new data arrives
- while it is reading the FIFO. We hack around this be defering
+ while it is reading the FIFO. We hack around this by deferring
subsequent transfers until after the driver polls the status word.
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=4446/1
*/
uint32_t clk, pc_c;
/*
- * Registers 200h and 204h are index and data registers for acessing
+ * Registers 200h and 204h are index and data registers for accessing
* indirect configuration registers within the device.
*/
vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000004, 4);
d->domain, d->bus, d->dev, d->func, name);
if (rc >= size || rc < 0) {
- /* The ouput is truncated or an other error is encountered */
+ /* The output is truncated, or some other error was encountered */
return -ENODEV;
}
return 0;
#define MODE_PAGE_TO_PROTECT 0x1d
#define MODE_PAGE_CAPABILITIES 0x2a
#define MODE_PAGE_ALLS 0x3f
-/* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
+/* Not in Mt. Fuji, but in ATAPI 2.6 -- deprecated now in favor
* of MODE_PAGE_SENSE_POWER */
#define MODE_PAGE_CDROM 0x0d
* address_space_init: initializes an address space
*
* @as: an uninitialized #AddressSpace
- * @root: a #MemoryRegion that routes addesses for the address space
+ * @root: a #MemoryRegion that routes addresses for the address space
* @name: an address space name. The name is only used for debugging
* output.
*/
unsigned char ah_p1;
unsigned char ah_p2;
unsigned char ah_Le;
- unsigned char ah_body[1]; /* indefinate length */
+ unsigned char ah_body[1]; /* indefinite length */
};
/*
/* newstatus is the source for the bits to be restored */
/* mask indicates the bits to be restored (the status bit that */
/* corresponds to each 1 bit in the mask is set to the value of */
-/* the correspnding bit in newstatus) */
+/* the corresponding bit in newstatus) */
/* returns context */
/* */
/* No error is possible. */
/* if a negative power the constant 1 is needed, and if not subset */
/* invert the lhs now rather than inverting the result later */
if (decNumberIsNegative(rhs)) { /* was a **-n [hence digits>0] */
- decNumber *inv=invbuff; /* asssume use fixed buffer */
+ decNumber *inv=invbuff; /* assume use fixed buffer */
decNumberCopy(&dnOne, dac); /* dnOne=1; [needed now or later] */
#if DECSUBSET
if (set->extended) { /* need to calculate 1/lhs */
/* */
/* Addition, especially x=x+1, is speed-critical. */
/* The static buffer is larger than might be expected to allow for */
-/* calls from higher-level funtions (notable exp). */
+/* calls from higher-level functions (notably exp). */
/* ------------------------------------------------------------------ */
static decNumber * decAddOp(decNumber *res, const decNumber *lhs,
const decNumber *rhs, decContext *set,
/* long subtractions. These are acc and var1 respectively. */
/* var1 is a copy of the lhs coefficient, var2 is the rhs coefficient.*/
/* The static buffers may be larger than might be expected to allow */
-/* for calls from higher-level funtions (notable exp). */
+/* for calls from higher-level functions (notably exp). */
/* ------------------------------------------------------------------ */
static decNumber * decDivideOp(decNumber *res,
const decNumber *lhs, const decNumber *rhs,
/* exp(-x) where x can be the tiniest number (Ntiny). */
/* */
/* 2. Normalizing x to be <=0.1 (instead of <=1) reduces loop */
-/* iterations by appoximately a third with additional (although */
+/* iterations by approximately a third with additional (although */
/* diminishing) returns as the range is reduced to even smaller */
/* fractions. However, h (the power of 10 used to correct the */
/* result at the end, see below) must be kept <=8 as otherwise */
break;
case TYPE_PTRVOID:
case TYPE_INT:
- /* int argment */
ret = get_errno(ioctl(fd, ie->host_cmd, arg));
break;
case TYPE_PTR:
(struct cdrom_multisession) */
#define TARGET_CDROM_GET_MCN 0x5311 /* Obtain the "Universal Product Code"
if available (struct cdrom_mcn) */
-#define TARGET_CDROM_GET_UPC TARGET_CDROM_GET_MCN /* This one is depricated,
+#define TARGET_CDROM_GET_UPC TARGET_CDROM_GET_MCN /* This one is deprecated,
but here anyway for compatibility */
#define TARGET_CDROMRESET 0x5312 /* hard-reset the drive */
#define TARGET_CDROMVOLREAD 0x5313 /* Get the drive's volume setting
};
/* soundcard defines */
-/* XXX: convert them all to arch indepedent entries */
+/* XXX: convert them all to arch independent entries */
#define TARGET_SNDCTL_COPR_HALT TARGET_IOWR('C', 7, int);
#define TARGET_SNDCTL_COPR_LOAD 0xcfb04301
#define TARGET_SNDCTL_COPR_RCODE 0xc0144303
ga_read_sysfs_file(dirfd, "removable", &removable, 1, &local_err);
if (local_err) {
- /* if no 'removable' file, it does't support offline mem blk */
+ /* if no 'removable' file, it doesn't support offline mem blk */
if (errno == ENOENT) {
error_free(local_err);
mem_blk->can_offline = false;
env->error_code = 0;
/* ??? We should cpu_restore_state to the faulting insn, but this hook
- does not have access to the retaddr value from the orignal helper.
+ does not have access to the retaddr value from the original helper.
It's all moot until the QEMU PALcode grows an MCHK handler. */
cpu_loop_exit(cs);
};
/* MMU translation table base control. */
TCR tcr_el[4];
- uint32_t c2_data; /* MPU data cachable bits. */
- uint32_t c2_insn; /* MPU instruction cachable bits. */
+ uint32_t c2_data; /* MPU data cacheable bits. */
+ uint32_t c2_insn; /* MPU instruction cacheable bits. */
union { /* MMU domain access control register
* MPU write buffer control.
*/
uint32_t sregs[4][16];
/* Linear feedback shift reg in the mmu. Used to provide pseudo
- randomness for the 'hint' the mmu gives to sw for chosing valid
+ randomness for the 'hint' the mmu gives to sw for choosing valid
sets on TLB refills. */
uint32_t mmu_rand_lfsr;
int cc_size_uptodate; /* -1 invalid or last written value. */
- int cc_x_uptodate; /* 1 - ccs, 2 - known | X_FLAG. 0 not uptodate. */
- int flags_uptodate; /* Wether or not $ccs is uptodate. */
- int flagx_known; /* Wether or not flags_x has the x flag known at
+ int cc_x_uptodate; /* 1 - ccs, 2 - known | X_FLAG. 0 not up-to-date. */
+ int flags_uptodate; /* Whether or not $ccs is up-to-date. */
+ int flagx_known; /* Whether or not flags_x has the x flag known at
translation time. */
int flags_x;
goto set_EPC;
case EXCP_DWATCH:
cause = 23;
- /* XXX: TODO: manage defered watch exceptions */
+ /* XXX: TODO: manage deferred watch exceptions */
goto set_EPC;
case EXCP_MCHECK:
cause = 24;
* @addr: the logical start address in guest memory
* @ar: the access register number
* @hostbuf: buffer in host memory. NULL = do only checks w/o copying
- * @len: length that should be transfered
+ * @len: length that should be transferred
* @is_write: true = write, false = read
- * Returns: 0 on success, non-zero if an exception or error occured
+ * Returns: 0 on success, non-zero if an exception or error occurred
*
* Use KVM ioctl to read/write from/to guest memory. An access exception
* is injected into the vCPU in case of translation errors.
int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
{
- /* For user mode, only U0 area is cachable. */
+ /* For user mode, only U0 area is cacheable. */
return !(addr & 0x80000000);
}
/* check area */
if (env->sr & (1u << SR_MD)) {
- /* For previledged mode, P2 and P4 area is not cachable. */
+ /* For privileged mode, P2 and P4 area is not cacheable. */
if ((0xA0000000 <= addr && addr < 0xC0000000) || 0xE0000000 <= addr)
return 0;
} else {
- /* For user mode, only U0 area is cachable. */
+ /* For user mode, only U0 area is cacheable. */
if (0x80000000 <= addr)
return 0;
}
/* The out-of-line thunks are all the same; load the return address
from B0, load the GP, and branch to the code. Note that we are
always post-call, so the register window has rolled, so we're
- using incomming parameter register numbers, not outgoing. */
+ using incoming parameter register numbers, not outgoing. */
if (dest == NULL) {
uintptr_t *desc = (uintptr_t *)helpers[x];
uintptr_t func = desc[0], gp = desc[1], disp;
}
}
}
- /* input arguments are live for preceeding opcodes */
+ /* input arguments are live for preceding opcodes */
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
arg = args[i];
dead_temps[arg] = 0;
dead_args |= (1 << i);
}
}
- /* input arguments are live for preceeding opcodes */
+ /* input arguments are live for preceding opcodes */
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
arg = args[i];
dead_temps[arg] = 0;
JSON:
'--command' accepts a JSON array of commands. Each command presents
- an application under test with all its paramaters as a list of strings,
+ an application under test with all its parameters as a list of strings,
e.g. ["qemu-io", "$test_img", "-c", "write $off $len"].
Supported application aliases: 'qemu-img' and 'qemu-io'.
target=quorum_repair_img, format=iotests.imgfmt)
self.assert_qmp(result, 'error/class', 'GenericError')
- def test_unexistant_replaces(self):
+ def test_nonexistent_replaces(self):
if not self.has_quorum():
return
/*
* Leave the event reset and tell qemu_event_set that there
* are waiters. No need to retry, because there cannot be
- * a concurent busy->free transition. After the CAS, the
+ * a concurrent busy->free transition. After the CAS, the
* event will be either set or busy.
*/
if (atomic_cmpxchg(&ev->value, EV_FREE, EV_BUSY) == EV_SET) {
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