qdev_connect_gpio_out(dev_splitter, 2, s->sec_resp_cfg_in);
}
-static void armsse_mainclk_update(void *opaque, ClockEvent event)
-{
- ARMSSE *s = ARM_SSE(opaque);
-
- /*
- * Set system_clock_scale from our Clock input; this is what
- * controls the tick rate of the CPU SysTick timer.
- */
- system_clock_scale = clock_ticks_to_ns(s->mainclk, 1);
-}
-
static void armsse_init(Object *obj)
{
ARMSSE *s = ARM_SSE(obj);
assert(info->sram_banks <= MAX_SRAM_BANKS);
assert(info->num_cpus <= SSE_MAX_CPUS);
- s->mainclk = qdev_init_clock_in(DEVICE(s), "MAINCLK",
- armsse_mainclk_update, s, ClockUpdate);
+ s->mainclk = qdev_init_clock_in(DEVICE(s), "MAINCLK", NULL, NULL, 0);
s->s32kclk = qdev_init_clock_in(DEVICE(s), "S32KCLK", NULL, NULL, 0);
memory_region_init(&s->container, obj, "armsse-container", UINT64_MAX);
* devices in the ARMSSE.
*/
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->container);
-
- /* Set initial system_clock_scale from MAINCLK */
- armsse_mainclk_update(s, ClockUpdate);
}
static void armsse_idau_check(IDAUInterface *ii, uint32_t address,
qdev_get_gpio_in(armv7m,
mmc->fpga_type == FPGA_AN511 ? 47 : 13));
- system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ;
-
armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
0x400000);
}
return;
}
- system_clock_scale = clock_ticks_to_ns(s->m3clk, 1);
-
for (i = 0; i < MSF2_NUM_UARTS; i++) {
if (serial_hd(i)) {
serial_mm_init(get_system_memory(), uart_addr[i], 2,
DeviceState *dev;
Clock *sysclk;
- system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ;
-
/* This clock doesn't need migration because it is fixed-frequency */
sysclk = clock_new(OBJECT(machine), "SYSCLK");
clock_set_hz(sysclk, SYSCLK_FRQ);
DeviceState *dev;
Clock *sysclk;
- system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ;
-
/* This clock doesn't need migration because it is fixed-frequency */
sysclk = clock_new(OBJECT(machine), "SYSCLK");
clock_set_hz(sysclk, SYSCLK_FRQ);
* will always provide one).
*/
- system_clock_scale = NANOSECONDS_PER_SECOND / HCLK_FRQ;
-
object_property_set_link(OBJECT(&s->cpu), "memory", OBJECT(&s->container),
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cpu), errp)) {
*/
static void ssys_calculate_system_clock(ssys_state *s, bool propagate_clock)
{
+ int period_ns;
/*
* SYSDIV field specifies divisor: 0 == /1, 1 == /2, etc. Input
* clock is 200MHz, which is a period of 5 ns. Dividing the clock
* frequency by X is the same as multiplying the period by X.
*/
if (ssys_use_rcc2(s)) {
- system_clock_scale = 5 * (((s->rcc2 >> 23) & 0x3f) + 1);
+ period_ns = 5 * (((s->rcc2 >> 23) & 0x3f) + 1);
} else {
- system_clock_scale = 5 * (((s->rcc >> 23) & 0xf) + 1);
+ period_ns = 5 * (((s->rcc >> 23) & 0xf) + 1);
}
- clock_set_ns(s->sysclk, system_clock_scale);
+ clock_set_ns(s->sysclk, period_ns);
if (propagate_clock) {
clock_propagate(s->sysclk);
}
DeviceState *dev;
Clock *sysclk;
- system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ;
-
/* This clock doesn't need migration because it is fixed-frequency */
sysclk = clock_new(OBJECT(machine), "SYSCLK");
clock_set_hz(sysclk, SYSCLK_FRQ);
#define SYSCALIB_SKEW (1U << 30)
#define SYSCALIB_TENMS ((1U << 24) - 1)
-int system_clock_scale;
-
static void systick_set_period_from_clock(SysTickState *s)
{
/*
Clock *cpuclk;
};
-/*
- * Multiplication factor to convert from system clock ticks to qemu timer
- * ticks. This should be set (by board code, usually) to a value
- * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency
- * in Hz of the CPU.
- *
- * This value is used by the systick device when it is running in
- * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to
- * set how fast the timer should tick.
- *
- * TODO: we should refactor this so that rather than using a global
- * we use a device property or something similar. This is complicated
- * because (a) the property would need to be plumbed through from the
- * board code down through various layers to the systick device
- * and (b) the property needs to be modifiable after realize, because
- * the stellaris board uses this to implement the behaviour where the
- * guest can reprogram the PLL registers to downclock the CPU, and the
- * systick device needs to react accordingly. Possibly this should
- * be deferred until we have a good API for modelling clock trees.
- */
-extern int system_clock_scale;
-
#endif