soc/tegra: pmc: Don't allocate struct tegra_powergate on stack

BugLink: http://bugs.launchpad.net/bugs/1815234
[ Upstream commit 495ac33a3b82f85ed4fbdd9b826c1d2fbc8e9b68 ]

With a later commit an instance of the struct device will be added to
struct genpd and with that the size of the struct tegra_powergate will
be over 1024 bytes. That generates following warning:

drivers/soc/tegra/pmc.c:579:1: warning: the frame size of 1200 bytes is larger than 1024 bytes [-Wframe-larger-than=]

Avoid such warnings by allocating the structure dynamically.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 0453ff6839a7eb68c8cede521d5004daaed0e6b2..185f7a8027bc60f46f0a3379a44ce8b9a8d3078e 100644 (file)
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -557,22 +557,28 @@ EXPORT_SYMBOL(tegra_powergate_remove_clamping);
 int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,
                                      struct reset_control *rst)
 {
-       struct tegra_powergate pg;
+       struct tegra_powergate *pg;
        int err;
 
        if (!tegra_powergate_is_available(id))
                return -EINVAL;
 
-       pg.id = id;
-       pg.clks = &clk;
-       pg.num_clks = 1;
-       pg.resets = &rst;
-       pg.num_resets = 1;
+       pg = kzalloc(sizeof(*pg), GFP_KERNEL);
+       if (!pg)
+               return -ENOMEM;
+
+       pg->id = id;
+       pg->clks = &clk;
+       pg->num_clks = 1;
+       pg->resets = &rst;
+       pg->num_resets = 1;
 
-       err = tegra_powergate_power_up(&pg, false);
+       err = tegra_powergate_power_up(pg, false);
        if (err)
                pr_err("failed to turn on partition %d: %d\n", id, err);
 
+       kfree(pg);
+
        return err;
 }
 EXPORT_SYMBOL(tegra_powergate_sequence_power_up);