]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commitdiff
dt-bindings: clock: Convert i.MX31 clock to json-schema
authorAnson Huang <Anson.Huang@nxp.com>
Thu, 28 May 2020 07:27:53 +0000 (15:27 +0800)
committerRob Herring <robh@kernel.org>
Fri, 29 May 2020 02:51:12 +0000 (20:51 -0600)
Convert the i.MX31 clock binding to DT schema format using json-schema.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/clock/imx31-clock.txt [deleted file]
Documentation/devicetree/bindings/clock/imx31-clock.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/clock/imx31-clock.txt b/Documentation/devicetree/bindings/clock/imx31-clock.txt
deleted file mode 100644 (file)
index 0a29109..0000000
+++ /dev/null
@@ -1,90 +0,0 @@
-* Clock bindings for Freescale i.MX31
-
-Required properties:
-- compatible: Should be "fsl,imx31-ccm"
-- reg: Address and length of the register set
-- interrupts: Should contain CCM interrupt
-- #clock-cells: Should be <1>
-
-The clock consumer should specify the desired clock by having the clock
-ID in its "clocks" phandle cell.  The following is a full list of i.MX31
-clocks and IDs.
-
-       Clock               ID
-       -----------------------
-       dummy                0
-       ckih                 1
-       ckil                 2
-       mpll                 3
-       spll                 4
-       upll                 5
-       mcu_main             6
-       hsp                  7
-       ahb                  8
-       nfc                  9
-       ipg                  10
-       per_div              11
-       per                  12
-       csi_sel              13
-       fir_sel              14
-       csi_div              15
-       usb_div_pre          16
-       usb_div_post         17
-       fir_div_pre          18
-       fir_div_post         19
-       sdhc1_gate           20
-       sdhc2_gate           21
-       gpt_gate             22
-       epit1_gate           23
-       epit2_gate           24
-       iim_gate             25
-       ata_gate             26
-       sdma_gate            27
-       cspi3_gate           28
-       rng_gate             29
-       uart1_gate           30
-       uart2_gate           31
-       ssi1_gate            32
-       i2c1_gate            33
-       i2c2_gate            34
-       i2c3_gate            35
-       hantro_gate          36
-       mstick1_gate         37
-       mstick2_gate         38
-       csi_gate             39
-       rtc_gate             40
-       wdog_gate            41
-       pwm_gate             42
-       sim_gate             43
-       ect_gate             44
-       usb_gate             45
-       kpp_gate             46
-       ipu_gate             47
-       uart3_gate           48
-       uart4_gate           49
-       uart5_gate           50
-       owire_gate           51
-       ssi2_gate            52
-       cspi1_gate           53
-       cspi2_gate           54
-       gacc_gate            55
-       emi_gate             56
-       rtic_gate            57
-       firi_gate            58
-
-Examples:
-
-clks: ccm@53f80000{
-       compatible = "fsl,imx31-ccm";
-       reg = <0x53f80000 0x4000>;
-       interrupts = <31>, <53>;
-       #clock-cells = <1>;
-};
-
-uart1: serial@43f90000 {
-       compatible = "fsl,imx31-uart", "fsl,imx21-uart";
-       reg = <0x43f90000 0x4000>;
-       interrupts = <45>;
-       clocks = <&clks 10>, <&clks 30>;
-       clock-names = "ipg", "per";
-};
diff --git a/Documentation/devicetree/bindings/clock/imx31-clock.yaml b/Documentation/devicetree/bindings/clock/imx31-clock.yaml
new file mode 100644 (file)
index 0000000..1b6f75d
--- /dev/null
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/imx31-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock bindings for Freescale i.MX31
+
+maintainers:
+  - Fabio Estevam <fabio.estevam@freescale.com>
+
+description: |
+  The clock consumer should specify the desired clock by having the clock
+  ID in its "clocks" phandle cell. The following is a full list of i.MX31
+  clocks and IDs.
+
+        Clock              ID
+        -----------------------
+        dummy               0
+        ckih                 1
+        ckil                 2
+        mpll                 3
+        spll                 4
+        upll                 5
+        mcu_main             6
+        hsp                  7
+        ahb                  8
+        nfc                  9
+        ipg                  10
+        per_div              11
+        per                  12
+        csi_sel              13
+        fir_sel              14
+        csi_div              15
+        usb_div_pre          16
+        usb_div_post         17
+        fir_div_pre          18
+        fir_div_post         19
+        sdhc1_gate           20
+        sdhc2_gate           21
+        gpt_gate             22
+        epit1_gate           23
+        epit2_gate           24
+        iim_gate             25
+        ata_gate             26
+        sdma_gate            27
+        cspi3_gate           28
+        rng_gate             29
+        uart1_gate           30
+        uart2_gate           31
+        ssi1_gate            32
+        i2c1_gate            33
+        i2c2_gate            34
+        i2c3_gate            35
+        hantro_gate          36
+        mstick1_gate         37
+        mstick2_gate         38
+        csi_gate             39
+        rtc_gate             40
+        wdog_gate            41
+        pwm_gate             42
+        sim_gate             43
+        ect_gate             44
+        usb_gate             45
+        kpp_gate             46
+        ipu_gate             47
+        uart3_gate           48
+        uart4_gate           49
+        uart5_gate           50
+        owire_gate           51
+        ssi2_gate            52
+        cspi1_gate           53
+        cspi2_gate           54
+        gacc_gate            55
+        emi_gate             56
+        rtic_gate            57
+        firi_gate            58
+
+properties:
+  compatible:
+    const: fsl,imx31-ccm
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description: CCM provides 2 interrupt requests, request 1 is to generate
+      interrupt for DVFS when a frequency change is requested, request 2 is
+      to generate interrupt for DPTC when a voltage change is requested.
+    items:
+      - description: CCM DVFS interrupt request 1
+      - description: CCM DPTC interrupt request 2
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@53f80000 {
+        compatible = "fsl,imx31-ccm";
+        reg = <0x53f80000 0x4000>;
+        interrupts = <31>, <53>;
+        #clock-cells = <1>;
+    };
+
+    serial@43f90000 {
+        compatible = "fsl,imx31-uart", "fsl,imx21-uart";
+        reg = <0x43f90000 0x4000>;
+        interrupts = <45>;
+        clocks = <&clks 10>, <&clks 30>;
+        clock-names = "ipg", "per";
+    };