drm/sun4i: Fix H6 HDMI PHY configuration

As it turns out, vendor HDMI PHY driver for H6 has a pretty big table
of predefined values for various pixel clocks. However, most of them are
not useful/tested because they come from reference driver code. Vendor
PHY driver is concerned with only few of those, namely 27 MHz, 74.25
MHz, 148.5 MHz, 297 MHz and 594 MHz. These are all frequencies for
standard CEA modes.

Fix sun50i_h6_cur_ctr and sun50i_h6_phy_config with the values only for
aforementioned frequencies.

Table sun50i_h6_mpll_cfg doesn't need to be changed because values are
actually frequency dependent and not so much SoC dependent. See i.MX6
documentation for explanation of those values for similar PHY.

Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20210209175900.7092-5-jernej.skrabec@siol.net

diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index 35c2133724e2d3d0fac03b0eacfecc7966586ba2..9994edf675096e6375a214df3fc9767d00e2552a 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -104,29 +104,21 @@ static const struct dw_hdmi_mpll_config sun50i_h6_mpll_cfg[] = {
 
 static const struct dw_hdmi_curr_ctrl sun50i_h6_cur_ctr[] = {
        /* pixelclk    bpp8    bpp10   bpp12 */
-       { 25175000,  { 0x0000, 0x0000, 0x0000 }, },
        { 27000000,  { 0x0012, 0x0000, 0x0000 }, },
-       { 59400000,  { 0x0008, 0x0008, 0x0008 }, },
-       { 72000000,  { 0x0008, 0x0008, 0x001b }, },
-       { 74250000,  { 0x0013, 0x0013, 0x0013 }, },
-       { 90000000,  { 0x0008, 0x001a, 0x001b }, },
-       { 118800000, { 0x001b, 0x001a, 0x001b }, },
-       { 144000000, { 0x001b, 0x001a, 0x0034 }, },
-       { 180000000, { 0x001b, 0x0033, 0x0034 }, },
-       { 216000000, { 0x0036, 0x0033, 0x0034 }, },
-       { 237600000, { 0x0036, 0x0033, 0x001b }, },
-       { 288000000, { 0x0036, 0x001b, 0x001b }, },
-       { 297000000, { 0x0019, 0x001b, 0x0019 }, },
-       { 330000000, { 0x0036, 0x001b, 0x001b }, },
-       { 594000000, { 0x003f, 0x001b, 0x001b }, },
+       { 74250000,  { 0x0013, 0x001a, 0x001b }, },
+       { 148500000, { 0x0019, 0x0033, 0x0034 }, },
+       { 297000000, { 0x0019, 0x001b, 0x001b }, },
+       { 594000000, { 0x0010, 0x001b, 0x001b }, },
        { ~0UL,      { 0x0000, 0x0000, 0x0000 }, }
 };
 
 static const struct dw_hdmi_phy_config sun50i_h6_phy_config[] = {
        /*pixelclk   symbol   term   vlev*/
-       { 74250000,  0x8009, 0x0004, 0x0232},
-       { 148500000, 0x8029, 0x0004, 0x0273},
-       { 594000000, 0x8039, 0x0004, 0x014a},
+       { 27000000,  0x8009, 0x0007, 0x02b0 },
+       { 74250000,  0x8009, 0x0006, 0x022d },
+       { 148500000, 0x8029, 0x0006, 0x0270 },
+       { 297000000, 0x8039, 0x0005, 0x01ab },
+       { 594000000, 0x8029, 0x0000, 0x008a },
        { ~0UL,      0x0000, 0x0000, 0x0000}
 };