drm/i915/dp: compute the pch dp aux divider from the rawclk

Otherwise dp aux won't work on some hsw platforms, since they use a
different rawclk than the 125MHz clock used thus far.

To absolutely not change anything, round up: That way we get the old
63 divider for the default 125MHz clock.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index adfb98cb7ba93b5bc5b62148792b4f651a07ffd9..c1ed1aff275045fa2259e2b47e4ec9a2271da9ec 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -377,7 +377,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
                else
                        aux_clock_divider = 225; /* eDP input clock at 450Mhz */
        } else if (HAS_PCH_SPLIT(dev))
-               aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */
+               aux_clock_divider = DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
        else
                aux_clock_divider = intel_hrawclk(dev) / 2;