ARM: dts: tegra: add Tegra20 NAND flash controller node

Add basic controller device tree node to be extended by
individual boards. Use the assigned-clocks mechanism to set
NDFLASH clock to a sensible default rate of 150MHz.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 86d8cd6f95481278cd6ba00a6f065ae23f12615a..15b73bd377f0408b948f80b36a4afaff82f14688 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -432,6 +432,21 @@
                status = "disabled";
        };
 
+       nand-controller@70008000 {
+               compatible = "nvidia,tegra20-nand";
+               reg = <0x70008000 0x100>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
+               clock-names = "nand";
+               resets = <&tegra_car 13>;
+               reset-names = "nand";
+               assigned-clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
+               assigned-clock-rates = <150000000>;
+               status = "disabled";
+       };
+
        pwm: pwm@7000a000 {
                compatible = "nvidia,tegra20-pwm";
                reg = <0x7000a000 0x100>;