mcde@a0350000 {
vana-supply = <&ab8500_ldo_ana_reg>;
- dsi-controller@a0351000 {
+ dsi@a0351000 {
vana-supply = <&ab8500_ldo_ana_reg>;
};
- dsi-controller@a0352000 {
+ dsi@a0352000 {
vana-supply = <&ab8500_ldo_ana_reg>;
};
- dsi-controller@a0353000 {
+ dsi@a0353000 {
vana-supply = <&ab8500_ldo_ana_reg>;
};
};
mcde@a0350000 {
vana-supply = <&ab8500_ldo_ana_reg>;
- dsi-controller@a0351000 {
+ dsi@a0351000 {
vana-supply = <&ab8500_ldo_ana_reg>;
};
- dsi-controller@a0352000 {
+ dsi@a0352000 {
vana-supply = <&ab8500_ldo_ana_reg>;
};
- dsi-controller@a0353000 {
+ dsi@a0353000 {
vana-supply = <&ab8500_ldo_ana_reg>;
};
};
ranges;
status = "disabled";
- dsi0: dsi-controller@a0351000 {
+ dsi0: dsi@a0351000 {
compatible = "ste,mcde-dsi";
reg = <0xa0351000 0x1000>;
clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
#address-cells = <1>;
#size-cells = <0>;
};
- dsi1: dsi-controller@a0352000 {
+ dsi1: dsi@a0352000 {
compatible = "ste,mcde-dsi";
reg = <0xa0352000 0x1000>;
clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
#address-cells = <1>;
#size-cells = <0>;
};
- dsi2: dsi-controller@a0353000 {
+ dsi2: dsi@a0353000 {
compatible = "ste,mcde-dsi";
reg = <0xa0353000 0x1000>;
/* This DSI port only has the Low Power / Energy Save clock */
mcde@a0350000 {
status = "okay";
- dsi-controller@a0351000 {
+ dsi@a0351000 {
panel {
compatible = "samsung,s6d16d0";
reg = <0>;
mcde@a0350000 {
status = "okay";
- dsi-controller@a0351000 {
+ dsi@a0351000 {
panel {
compatible = "samsung,s6d16d0";
reg = <0>;
mcde@a0350000 {
status = "okay";
- dsi-controller@a0351000 {
+ dsi@a0351000 {
panel {
compatible = "sony,acx424akp";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&dsi_default_mode>;
- dsi-controller@a0351000 {
+ dsi@a0351000 {
panel@0 {
compatible = "samsung,s6e63m0";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&dsi_default_mode>;
- dsi-controller@a0351000 {
+ dsi@a0351000 {
panel {
/* NT35510-based Hydis HVA40WV1 */
compatible = "hydis,hva40wv1", "novatek,nt35510";