ARM: dts: imx6qdl-wandboard: Let the codec control MCLK pinctrl

sgtl5000 codec needs MCLK clock to be present so that it can
successfully read/write via I2C.

In the case of wandboard, MCLK is provided via
MX6QDL_PAD_GPIO_0__CCM_CLKO1 pad.

Move the MCLK pinctrl from hog group to the codec group, so that the
codec clock can be present prior to reading the codec ID.

This avoids the following error that happens from time to time:

[    2.484443] sgtl5000 1-000a: Error reading chip id -6

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
index a3208913226395ebfc98665770bc5faefb0129b2..855dc6f9df75f00326d8d0be51ea34343124ed66 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
@@ -17,7 +17,6 @@
        imx6qdl-wandboard {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
-                               MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0         /* GPIO_0_CLKO */
                                MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x80000000      /* uSDHC1 CD */
                                MX6QDL_PAD_EIM_DA9__GPIO3_IO09          0x80000000      /* uSDHC3 CD */
                                MX6QDL_PAD_EIM_EB1__GPIO2_IO29          0x0f0b0         /* WL_REF_ON */

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
index 8d893a78cdf0c4dbbb44627de526c9aa81fd1d41..49a0a557e62ef8a76f9164e896f44cadd9eb945f 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
@@ -17,7 +17,6 @@
        imx6qdl-wandboard {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
-                               MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0         /* GPIO_0_CLKO */
                                MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x80000000      /* uSDHC1 CD */
                                MX6QDL_PAD_EIM_DA9__GPIO3_IO09          0x80000000      /* uSDHC3 CD */
                                MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00       0x0f0b0         /* WIFI_ON (reset, active low) */

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
index 3a8a4952d45e09d0d74171ec1092a731833b2b5d..69d9c8661439bd960b72380b9cac11022cce7a20 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
@@ -147,7 +147,6 @@
        imx6qdl-wandboard {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
-                               MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
                                MX6QDL_PAD_EIM_D22__USB_OTG_PWR         0x80000000      /* USB Power Enable */
                                MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x80000000      /* USDHC1 CD */
                                MX6QDL_PAD_EIM_DA9__GPIO3_IO09          0x80000000      /* uSDHC3 CD */

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index ed96d7b5feabdb276de7f0750c25c5dba26d6c1c..6b0a86fa72d3d5ad3a17935da2d7af0c8746db41 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -83,6 +83,8 @@
        status = "okay";
 
        codec: sgtl5000@a {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_mclk>;
                compatible = "fsl,sgtl5000";
                reg = <0x0a>;
                clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -142,6 +144,12 @@
                        >;
                };
 
+               pinctrl_mclk: mclkgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
+                       >;
+               };
+
                pinctrl_spdif: spdifgrp {
                        fsl,pins = <
                                MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0