x86/cpu/AMD: Remove now unused definition of MFENCE_RDTSC feature

CVE-2017-5753
CVE-2017-5715

With the switch to using LFENCE_RDTSC on AMD platforms there is no longer
a need for the MFENCE_RDTSC feature.  Remove it usage and definition.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Andy Whitcroft <apw@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index aae78054cae2918aacb40a286cf2360dcb751b52..d0043257944486b4e1f8bd2e67414cc09db39b50 100644 (file)
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -23,8 +23,7 @@
 #define wmb()  asm volatile("sfence" ::: "memory")
 #endif
 
-#define gmb() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \
-                                      "lfence", X86_FEATURE_LFENCE_RDTSC);
+#define gmb() alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
 
 #ifdef CONFIG_X86_PPRO_FENCE
 #define dma_rmb()      rmb()

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 898dba2e2e2cd4df06bb4e05298f01a97ff85e7a..3139098269f69144f713b2056c74c8bb619c8160 100644 (file)
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -213,8 +213,7 @@ static __always_inline unsigned long long rdtsc_ordered(void)
         * that some other imaginary CPU is updating continuously with a
         * time stamp.
         */
-       alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC,
-                         "lfence", X86_FEATURE_LFENCE_RDTSC);
+       alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
        return rdtsc();
 }
 

diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index 879dbfefb66d7a86548060903d8b358b4e24dfe5..e20e304320f9d7ade7eef79896be59324afbe88d 100644 (file)
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -116,9 +116,6 @@ static void emit_memory_barrier(u8 **pprog)
                if (boot_cpu_has(X86_FEATURE_LFENCE_RDTSC))
                        /* x86 LFENCE opcode 0F AE E8 */
                        EMIT3(0x0f, 0xae, 0xe8);
-               else if (boot_cpu_has(X86_FEATURE_MFENCE_RDTSC))
-                       /* AMD MFENCE opcode 0F AE F0 */
-                       EMIT3(0x0f, 0xae, 0xf0);
                else
                        /* we should never end up here,
                         * but if we do, better not to emit anything*/