Merge branch arm64/for-next/sysreg into kvm-arm64/misc-5.15

Merge the arm64/for-next/sysreg branch to avoid merge conflicts
in -next and upstream.

* arm64/for-next/sysreg:
  arm64/kexec: Test page size support with new TGRAN range values

Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --cc arch/arm64/include/asm/cpufeature.h
Simple merge

diff --cc arch/arm64/include/asm/sysreg.h
index 1972e4b9be5c07a84ae7f55279affb5a3f360cab,aa53954c2f6b957fa074469cd942f20f38b357bc..2084b22613e2a925dfdf92aaa2b7eb3e9de4c415
--- 1/arch/arm64/include/asm/sysreg.h
--- 2/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@@ -847,17 -847,16 +847,21 @@@
  #define ID_AA64MMFR0_ASID_SHIFT               4
  #define ID_AA64MMFR0_PARANGE_SHIFT    0
  
- #define ID_AA64MMFR0_TGRAN4_NI                0xf
- #define ID_AA64MMFR0_TGRAN4_SUPPORTED 0x0
- #define ID_AA64MMFR0_TGRAN64_NI               0xf
- #define ID_AA64MMFR0_TGRAN64_SUPPORTED        0x0
- #define ID_AA64MMFR0_TGRAN16_NI               0x0
- #define ID_AA64MMFR0_TGRAN16_SUPPORTED        0x1
+ #define ID_AA64MMFR0_TGRAN4_NI                        0xf
+ #define ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN     0x0
+ #define ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX     0x7
+ #define ID_AA64MMFR0_TGRAN64_NI                       0xf
+ #define ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN    0x0
+ #define ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX    0x7
+ #define ID_AA64MMFR0_TGRAN16_NI                       0x0
+ #define ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN    0x1
+ #define ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX    0xf
+ 
 +#define ID_AA64MMFR0_PARANGE_32               0x0
 +#define ID_AA64MMFR0_PARANGE_36               0x1
 +#define ID_AA64MMFR0_PARANGE_40               0x2
 +#define ID_AA64MMFR0_PARANGE_42               0x3
 +#define ID_AA64MMFR0_PARANGE_44               0x4
  #define ID_AA64MMFR0_PARANGE_48               0x5
  #define ID_AA64MMFR0_PARANGE_52               0x6
  
@@@ -1035,19 -1032,16 +1039,19 @@@
  
  #if defined(CONFIG_ARM64_4K_PAGES)
  #define ID_AA64MMFR0_TGRAN_SHIFT              ID_AA64MMFR0_TGRAN4_SHIFT
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN      ID_AA64MMFR0_TGRAN4_SUPPORTED
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX      0x7
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN      ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX      ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX
 +#define ID_AA64MMFR0_TGRAN_2_SHIFT            ID_AA64MMFR0_TGRAN4_2_SHIFT
  #elif defined(CONFIG_ARM64_16K_PAGES)
  #define ID_AA64MMFR0_TGRAN_SHIFT              ID_AA64MMFR0_TGRAN16_SHIFT
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN      ID_AA64MMFR0_TGRAN16_SUPPORTED
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX      0xF
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN      ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX      ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX
 +#define ID_AA64MMFR0_TGRAN_2_SHIFT            ID_AA64MMFR0_TGRAN16_2_SHIFT
  #elif defined(CONFIG_ARM64_64K_PAGES)
  #define ID_AA64MMFR0_TGRAN_SHIFT              ID_AA64MMFR0_TGRAN64_SHIFT
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN      ID_AA64MMFR0_TGRAN64_SUPPORTED
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX      0x7
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN      ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX      ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX
 +#define ID_AA64MMFR0_TGRAN_2_SHIFT            ID_AA64MMFR0_TGRAN64_2_SHIFT
  #endif
  
  #define MVFR2_FPMISC_SHIFT            4