Make mtvscr use a helper

Do this so we can set float statuses once per mtvscr, rather than once
per Altivec instruction.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6508 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 755bfbae48e3966871aa3caaa096d6adea511029..8c04ba71b04a7d35a51e3640ca1cddd673ace0bd 100644 (file)
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -220,6 +220,7 @@ DEF_HELPER_4(vmsumuhs, void, avr, avr, avr, avr)
 DEF_HELPER_4(vmsumshm, void, avr, avr, avr, avr)
 DEF_HELPER_4(vmsumshs, void, avr, avr, avr, avr)
 DEF_HELPER_4(vmladduhm, void, avr, avr, avr, avr)
+DEF_HELPER_1(mtvscr, void, avr);
 DEF_HELPER_2(lvebx, void, avr, tl)
 DEF_HELPER_2(lvehx, void, avr, tl)
 DEF_HELPER_2(lvewx, void, avr, tl)

diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 5a5a06ed7d35a57ef101f8421b0054081231f2b8..efeac8329198d5888f3fe0bacf12e3076bb16acc 100644 (file)
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -2050,6 +2050,16 @@ STVE(stvewx, stl, bswap32, u32)
 #undef I
 #undef LVE
 
+void helper_mtvscr (ppc_avr_t *r)
+{
+#if defined(WORDS_BIGENDIAN)
+    env->vscr = r->u32[3];
+#else
+    env->vscr = r->u32[0];
+#endif
+    set_flush_to_zero(vscr_nj, &env->vec_status);
+}
+
 void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
 {
     int i;

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 1cc78cd9cd0a05af697351cfd6051bc90b11263e..59e4ced45dd5a926dc936076715bba07cc190f7e 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6268,15 +6268,14 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC)
 
 GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC)
 {
-    TCGv_i32 t;
+    TCGv_ptr p;
     if (unlikely(!ctx->altivec_enabled)) {
         gen_exception(ctx, POWERPC_EXCP_VPU);
         return;
     }
-    t = tcg_temp_new_i32();
-    tcg_gen_trunc_i64_i32(t, cpu_avrl[rD(ctx->opcode)]);
-    tcg_gen_st_i32(t, cpu_env, offsetof(CPUState, vscr));
-    tcg_temp_free_i32(t);
+    p = gen_avr_ptr(rD(ctx->opcode));
+    gen_helper_mtvscr(p);
+    tcg_temp_free_ptr(p);
 }
 
 /* Logical operations */