drm/i915/display: Move enable_fbc module parameter under display

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231024124109.384973-4-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index af0c79a4c9a4f50d1e41f8e438ad475f6dedfcd4..b37c0d02d5000bbf505dcab22acd4340baafdc62 100644 (file)
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -2993,7 +2993,7 @@ static void ilk_wm_merge(struct drm_i915_private *dev_priv,
 
        /* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
        if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) &&
-           dev_priv->params.enable_fbc && !merged->fbc_wm_enabled) {
+           dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
                for (level = 2; level < num_levels; level++) {
                        struct intel_wm_level *wm = &merged->wm[level];
 

diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11ee73a98b5b0ea1b54d2b1deb1d0ad4f15ceaa7..330613cd64dbde05a1709704541b1bc348c115a8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
  * debugfs mode to 0.
  */
 
+intel_display_param_named_unsafe(enable_fbc, int, 0400,
+       "Enable frame buffer compression for power savings "
+       "(default: -1 (use per-chip default))");
+
 __maybe_unused
 static void _param_print_bool(struct drm_printer *p, const char *driver_name,
                              const char *name, bool val)

diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index eac66042da4dce9ab4d7e8b8c3dcb704e752093c..198b03da80555cd5f042be0178b6798e2136e95d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -21,7 +21,8 @@ struct drm_i915_private;
  * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
  *       debugfs file
  */
-#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) /* empty define to avoid build failure */
+#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
+       param(int, enable_fbc, -1, 0600) \
 
 #define MEMBER(T, member, ...) T member;
 struct intel_display_params {

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 4820d21cc942a0202d6b34317035b73f3d0a427c..bde12fe622750f046e01dc3dd34026c7bd8ffeb0 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1174,7 +1174,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
                return 0;
        }
 
-       if (!i915->params.enable_fbc) {
+       if (!i915->display.params.enable_fbc) {
                plane_state->no_fbc_reason = "disabled per module param or by default";
                return 0;
        }
@@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
  */
 static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
 {
-       if (i915->params.enable_fbc >= 0)
-               return !!i915->params.enable_fbc;
+       if (i915->display.params.enable_fbc >= 0)
+               return !!i915->display.params.enable_fbc;
 
        if (!HAS_FBC(i915))
                return 0;
@@ -1824,9 +1824,9 @@ void intel_fbc_init(struct drm_i915_private *i915)
        if (need_fbc_vtd_wa(i915))
                DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
 
-       i915->params.enable_fbc = intel_sanitize_fbc_option(i915);
+       i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
        drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
-                   i915->params.enable_fbc);
+                   i915->display.params.enable_fbc);
 
        for_each_fbc_id(i915, fbc_id)
                i915->display.fbc[fbc_id] = intel_fbc_create(i915, fbc_id);

diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 036c4c3ed6ed616ee592aa240c332e6a4be9f466..42700b854b7947befb23bc299c87563f3ebb6590 100644 (file)
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
        "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
        "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
 
-i915_param_named_unsafe(enable_fbc, int, 0400,
-       "Enable frame buffer compression for power savings "
-       "(default: -1 (use per-chip default))");
-
 i915_param_named_unsafe(lvds_channel_mode, int, 0400,
         "Specify LVDS channel mode "
         "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");

diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index d5194b039aaba368aebc0fc14b2c7f6dc57ffb92..e674de29f92c8504966b0296fe4bb379cfd44697 100644 (file)
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -52,7 +52,6 @@ struct drm_printer;
        param(int, panel_use_ssc, -1, 0600) \
        param(int, vbt_sdvo_panel_type, -1, 0400) \
        param(int, enable_dc, -1, 0400) \
-       param(int, enable_fbc, -1, 0600) \
        param(int, enable_psr, -1, 0600) \
        param(bool, enable_dpt, true, 0400) \
        param(bool, psr_safest_params, false, 0400) \