]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
mmc: sdhci-s3c: add default controller configuration
authorThomas Abraham <thomas.abraham@linaro.org>
Wed, 14 Sep 2011 07:09:17 +0000 (12:39 +0530)
committerChris Ball <cjb@laptop.org>
Wed, 26 Oct 2011 19:43:42 +0000 (15:43 -0400)
The default controller configuration which was previously setup by
platform helper functions is moved into the driver.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/sdhci-s3c.c

index fe886d6c474a41718fb4b388c90c14ad26bf823e..82709b6da8614d0f72b49e6049a9632b95af185d 100644 (file)
@@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
                writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
        }
 
-       /* reconfigure the hardware for new clock rate */
-
-       {
-               struct mmc_ios ios;
-
-               ios.clock = clock;
-
-               if (ourhost->pdata->cfg_card)
-                       (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
-                                                  &ios, NULL);
-       }
+       /* reprogram default hardware configuration */
+       writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
+               host->ioaddr + S3C64XX_SDHCI_CONTROL4);
+
+       ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
+       ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+                 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+                 S3C_SDHCI_CTRL2_ENFBCLKRX |
+                 S3C_SDHCI_CTRL2_DFCNT_NONE |
+                 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+       writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
+
+       /* reconfigure the controller for new clock rate */
+       ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+       if (clock < 25 * 1000000)
+               ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
+       writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
 }
 
 /**