]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
ARM: dts: meson: add the SDHC MMC controller
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sat, 20 Jun 2020 16:36:52 +0000 (18:36 +0200)
committerKevin Hilman <khilman@baylibre.com>
Mon, 13 Jul 2020 18:58:15 +0000 (11:58 -0700)
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).

On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com
arch/arm/boot/dts/meson.dtsi
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b.dtsi
arch/arm/boot/dts/meson8m2.dtsi

index ae89deaa8c9c4f9ae2f0e2b98463f3fefb293e7e..46405798957243fff23238c994041a8e99b6d4be 100644 (file)
                                status = "disabled";
                        };
 
+                       sdhc: mmc@8e00 {
+                               compatible = "amlogic,meson-mx-sdhc";
+                               reg = <0x8e00 0x42>;
+                               interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>;
+                               status = "disabled";
+                       };
+
                        gpio_intc: interrupt-controller@9880 {
                                compatible = "amlogic,meson-gpio-intc";
                                reg = <0x9880 0x10>;
index d09d19d4423a5f65642c6e36e2364c25cf0b85e3..277c0bb104534cb17940988d03fb22f3a761c9b6 100644 (file)
                        };
                };
 
+               sdxc_b_pins: sdxc-b {
+                       mux {
+                               groups = "sdxc_d0_b", "sdxc_d13_b",
+                                        "sdxc_clk_b", "sdxc_cmd_b";
+                               function = "sdxc_b";
+                               bias-pull-up;
+                       };
+               };
+
                spi_nor_pins: nor {
                        mux {
                                groups = "nor_d", "nor_q", "nor_c", "nor_cs";
        nvmem-cell-names = "temperature_calib";
 };
 
+&sdhc {
+       compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
+       clocks = <&xtal>,
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>,
+                <&clkc CLKID_FCLK_DIV5>,
+                <&clkc CLKID_SDHC>;
+       clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
+};
+
 &sdio {
        compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio";
        clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
index 2069c57343e56ce98e67f5717e34684a28b8d689..2401cdf5f7511be3bd16e4b77db46e3e88f7152f 100644 (file)
                        };
                };
 
+               sdxc_c_pins: sdxc-c {
+                       mux {
+                               groups = "sdxc_d0_c", "sdxc_d13_c",
+                                        "sdxc_d47_c", "sdxc_clk_c",
+                                        "sdxc_cmd_c";
+                               function = "sdxc_c";
+                               bias-pull-up;
+                       };
+               };
+
                pwm_c1_pins: pwm-c1 {
                        mux {
                                groups = "pwm_c1";
        nvmem-cell-names = "temperature_calib";
 };
 
+&sdhc {
+       compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
+       clocks = <&xtal>,
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>,
+                <&clkc CLKID_FCLK_DIV5>,
+                <&clkc CLKID_SDHC>;
+       clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
+};
+
 &sdio {
        compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
        clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
index c7ddbb21036678a8c10de1734d66e9d0946c6e1c..6725dd9fd825cca7f70cfb77090e95e632dc7953 100644 (file)
        compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc";
 };
 
+&sdhc {
+       compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
+};
+
 &usb0_phy {
        compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
 };