} else {
*mic = false;
regmap_write(rt286->regmap, RT286_SET_MIC1, 0x20);
+++++ regmap_update_bits(rt286->regmap,
+++++ RT286_CBJ_CTRL1, 0x0400, 0x0000);
}
} else {
regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
return 0;
}
----- static int rt286_vref_event(struct snd_soc_dapm_widget *w,
----- struct snd_kcontrol *kcontrol, int event)
----- {
----- struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
-----
----- switch (event) {
----- case SND_SOC_DAPM_PRE_PMU:
----- snd_soc_update_bits(codec,
----- RT286_CBJ_CTRL1, 0x0400, 0x0000);
----- mdelay(50);
----- break;
----- default:
----- return 0;
----- }
-----
----- return 0;
----- }
-----
static int rt286_ldo2_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
SND_SOC_DAPM_SUPPLY_S("HV", 1, RT286_POWER_CTRL1,
12, 1, NULL, 0),
SND_SOC_DAPM_SUPPLY("VREF", RT286_POWER_CTRL1,
----- 0, 1, rt286_vref_event, SND_SOC_DAPM_PRE_PMU),
+++++ 0, 1, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT286_POWER_CTRL2,
2, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY_S("LDO2", 2, RT286_POWER_CTRL1,
case SND_SOC_BIAS_ON:
mdelay(10);
----- snd_soc_update_bits(codec,
----- RT286_CBJ_CTRL1, 0x0400, 0x0400);
snd_soc_update_bits(codec,
RT286_DC_GAIN, 0x200, 0x0);
case SND_SOC_BIAS_STANDBY:
snd_soc_write(codec,
RT286_SET_AUDIO_POWER, AC_PWRST_D3);
----- snd_soc_update_bits(codec,
----- RT286_CBJ_CTRL1, 0x0400, 0x0000);
break;
default:
DMI_MATCH(DMI_BOARD_NAME, "Wilson Beach SDS")
}
},
+ ++ {
+ ++ .ident = "Intel Skylake RVP",
+ ++ .matches = {
+ ++ DMI_MATCH(DMI_PRODUCT_NAME, "Skylake Client platform")
+ ++ }
+ ++ },
{ }
};