target-alpha: Fix fbcond branch offset.

The instructions use a disp21 like all other branch insns,
not the disp16 that was being passed.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 029bcd998a410b2c7bb1cafd47a545d4b5ce40f2..fbcedde3ea1788d5d6d211a2b33a4770c2cd7aae 100644 (file)
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -314,8 +314,7 @@ static inline void gen_bcond(DisasContext *ctx, TCGCond cond, int ra,
     gen_set_label(l2);
 }
 
-static inline void gen_fbcond(DisasContext *ctx, int opc, int ra,
-                              int32_t disp16)
+static inline void gen_fbcond(DisasContext *ctx, int opc, int ra, int32_t disp)
 {
     int l1, l2;
     TCGv tmp;
@@ -356,7 +355,7 @@ static inline void gen_fbcond(DisasContext *ctx, int opc, int ra,
     tcg_gen_movi_i64(cpu_pc, ctx->pc);
     tcg_gen_br(l2);
     gen_set_label(l1);
-    tcg_gen_movi_i64(cpu_pc, ctx->pc + (int64_t)(disp16 << 2));
+    tcg_gen_movi_i64(cpu_pc, ctx->pc + (int64_t)(disp << 2));
     gen_set_label(l2);
 }
 
@@ -2335,7 +2334,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
     case 0x31: /* FBEQ */
     case 0x32: /* FBLT */
     case 0x33: /* FBLE */
-        gen_fbcond(ctx, opc, ra, disp16);
+        gen_fbcond(ctx, opc, ra, disp21);
         ret = 1;
         break;
     case 0x34:
@@ -2348,7 +2347,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
     case 0x35: /* FBNE */
     case 0x36: /* FBGE */
     case 0x37: /* FBGT */
-        gen_fbcond(ctx, opc, ra, disp16);
+        gen_fbcond(ctx, opc, ra, disp21);
         ret = 1;
         break;
     case 0x38: