net: hns3: Enable HW GRO for Rev B(=0x21) HNS3 hardware

BugLink: https://bugs.launchpad.net/bugs/1810457
HNS3 hardware Revision B(=0x21) supports Hardware GRO feature. This
patch enables this feature in the HNS3 PF/VF driver.

Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit b26a6fea229885e98e9383c53b5c5dcfc45f76d8)
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index f69d39f17bddf2f0a0c35d20a9b9e777bf7da678..21d934b7a2a37afdd0e53880b6fb0049427f5e1a 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -52,6 +52,7 @@
 #define HNAE3_UNIC_CLIENT_INITED_B             0x4
 #define HNAE3_ROCE_CLIENT_INITED_B             0x5
 #define HNAE3_DEV_SUPPORT_FD_B                 0x6
+#define HNAE3_DEV_SUPPORT_GRO_B                        0x7
 
 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
                BIT(HNAE3_DEV_SUPPORT_ROCE_B))
@@ -65,6 +66,9 @@
 #define hnae3_dev_fd_supported(hdev) \
        hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
 
+#define hnae3_dev_gro_supported(hdev) \
+       hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
+
 #define ring_ptr_move_fw(ring, p) \
        ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
 #define ring_ptr_move_bw(ring, p) \

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index 78eb4fb9eda60f652522077694f18b0c9cad8543..8deda40560264bc817dd28f45e4c2071f6a13986 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -1714,8 +1714,10 @@ static void hns3_disable_sriov(struct pci_dev *pdev)
 static void hns3_get_dev_capability(struct pci_dev *pdev,
                                    struct hnae3_ae_dev *ae_dev)
 {
-       if (pdev->revision >= 0x21)
+       if (pdev->revision >= 0x21) {
                hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
+               hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
+       }
 }
 
 /* hns3_probe - Device initialization routine

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 872cd4bdd70d73ac232c43861d07c52dc64383b5..aef044d08b11fa66bfdcadb903b190d75d748e7a 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -152,6 +152,7 @@ enum hclge_opcode_type {
 
        /* TSO command */
        HCLGE_OPC_TSO_GENERIC_CONFIG    = 0x0C01,
+       HCLGE_OPC_GRO_GENERIC_CONFIG    = 0x0C10,
 
        /* RSS commands */
        HCLGE_OPC_RSS_GENERIC_CONFIG    = 0x0D01,
@@ -758,6 +759,12 @@ struct hclge_cfg_tso_status_cmd {
        u8 rsv[20];
 };
 
+#define HCLGE_GRO_EN_B         0
+struct hclge_cfg_gro_status_cmd {
+       __le16 gro_en;
+       u8 rsv[22];
+};
+
 #define HCLGE_TSO_MSS_MIN      256
 #define HCLGE_TSO_MSS_MAX      9668
 

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 76c273a0762a83798b99bfab0d776742d417691e..2aad743afcd61bfff87cba4cd7cd67d8ddd2b6de 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -921,6 +921,28 @@ static int hclge_config_tso(struct hclge_dev *hdev, int tso_mss_min,
        return hclge_cmd_send(&hdev->hw, &desc, 1);
 }
 
+static int hclge_config_gro(struct hclge_dev *hdev, bool en)
+{
+       struct hclge_cfg_gro_status_cmd *req;
+       struct hclge_desc desc;
+       int ret;
+
+       if (!hnae3_dev_gro_supported(hdev))
+               return 0;
+
+       hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_GRO_GENERIC_CONFIG, false);
+       req = (struct hclge_cfg_gro_status_cmd *)desc.data;
+
+       req->gro_en = cpu_to_le16(en ? 1 : 0);
+
+       ret = hclge_cmd_send(&hdev->hw, &desc, 1);
+       if (ret)
+               dev_err(&hdev->pdev->dev,
+                       "GRO hardware config cmd failed, ret = %d\n", ret);
+
+       return ret;
+}
+
 static int hclge_alloc_tqps(struct hclge_dev *hdev)
 {
        struct hclge_tqp *tqp;
@@ -7100,6 +7122,10 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
                goto err_mdiobus_unreg;
        }
 
+       ret = hclge_config_gro(hdev, true);
+       if (ret)
+               goto err_mdiobus_unreg;
+
        ret = hclge_init_vlan_config(hdev);
        if (ret) {
                dev_err(&pdev->dev, "VLAN init fail, ret =%d\n", ret);
@@ -7231,6 +7257,10 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev)
                return ret;
        }
 
+       ret = hclge_config_gro(hdev, true);
+       if (ret)
+               return ret;
+
        ret = hclge_init_vlan_config(hdev);
        if (ret) {
                dev_err(&pdev->dev, "VLAN init fail, ret =%d\n", ret);

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h
index 090541de0c7dffee07ed87c71567b4eefdd208a2..47030b42341fbb61e5ea36dc80076760d3b00b31 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h
@@ -87,6 +87,8 @@ enum hclgevf_opcode_type {
        HCLGEVF_OPC_QUERY_TX_STATUS     = 0x0B03,
        HCLGEVF_OPC_QUERY_RX_STATUS     = 0x0B13,
        HCLGEVF_OPC_CFG_COM_TQP_QUEUE   = 0x0B20,
+       /* GRO command */
+       HCLGEVF_OPC_GRO_GENERIC_CONFIG  = 0x0C10,
        /* RSS cmd */
        HCLGEVF_OPC_RSS_GENERIC_CONFIG  = 0x0D01,
        HCLGEVF_OPC_RSS_INPUT_TUPLE     = 0x0D02,
@@ -149,6 +151,12 @@ struct hclgevf_query_res_cmd {
        __le16 rsv[7];
 };
 
+#define HCLGEVF_GRO_EN_B               0
+struct hclgevf_cfg_gro_status_cmd {
+       __le16 gro_en;
+       u8 rsv[22];
+};
+
 #define HCLGEVF_RSS_DEFAULT_OUTPORT_B  4
 #define HCLGEVF_RSS_HASH_KEY_OFFSET_B  4
 #define HCLGEVF_RSS_HASH_KEY_NUM       16

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 6b4d1477055f1cf6f7340984e6288d4cc19ad74c..2e889b82997682b647be227a7a28671cd2193044 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -1655,6 +1655,29 @@ static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev)
        return 0;
 }
 
+static int hclgevf_config_gro(struct hclgevf_dev *hdev, bool en)
+{
+       struct hclgevf_cfg_gro_status_cmd *req;
+       struct hclgevf_desc desc;
+       int ret;
+
+       if (!hnae3_dev_gro_supported(hdev))
+               return 0;
+
+       hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG,
+                                    false);
+       req = (struct hclgevf_cfg_gro_status_cmd *)desc.data;
+
+       req->gro_en = cpu_to_le16(en ? 1 : 0);
+
+       ret = hclgevf_cmd_send(&hdev->hw, &desc, 1);
+       if (ret)
+               dev_err(&hdev->pdev->dev,
+                       "VF GRO hardware config cmd failed, ret = %d.\n", ret);
+
+       return ret;
+}
+
 static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev)
 {
        struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg;
@@ -2122,6 +2145,10 @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev)
                return ret;
        }
 
+       ret = hclgevf_config_gro(hdev, true);
+       if (ret)
+               return ret;
+
        ret = hclgevf_init_vlan_config(hdev);
        if (ret) {
                dev_err(&hdev->pdev->dev,
@@ -2199,6 +2226,10 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
                goto err_config;
        }
 
+       ret = hclgevf_config_gro(hdev, true);
+       if (ret)
+               goto err_config;
+
        /* Initialize RSS for this VF */
        ret = hclgevf_rss_init_hw(hdev);
        if (ret) {