net: dsa: bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278

Either port 5 or port 8 can be used on a 7278 device, make sure that
port 5 also gets configured properly for 2Gb/sec in that case.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index d1955543acd1d1d151d8292c9638c25de2267ae0..6feaf8cb08098f19bb02ca5ab3acb766c7b9806a 100644 (file)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -616,6 +616,9 @@ force_link:
        if (state->duplex == DUPLEX_FULL)
                reg |= DUPLX_MODE;
 
+       if (priv->type == BCM7278_DEVICE_ID && dsa_is_cpu_port(ds, port))
+               reg |= GMIIP_SPEED_UP_2G;
+
        core_writel(priv, reg, offset);
 }
 

diff --git a/drivers/net/dsa/bcm_sf2_regs.h b/drivers/net/dsa/bcm_sf2_regs.h
index d8a5e6269c0efb00d25f229b21b5caad5ef2e05a..78447817633594305cfda5136419e44be9146e33 100644 (file)
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -178,6 +178,7 @@ enum bcm_sf2_reg_offs {
 #define  RXFLOW_CNTL                   (1 << 4)
 #define  TXFLOW_CNTL                   (1 << 5)
 #define  SW_OVERRIDE                   (1 << 6)
+#define  GMIIP_SPEED_UP_2G             (1 << 7)
 
 #define CORE_WATCHDOG_CTRL             0x001e4
 #define  SOFTWARE_RESET                        (1 << 7)