ARM: dts: aspeed: add SPI controller bindings

Let's define the SPI controllers in the Aspeed SoCs AST2500 and
AST2400 and also enable these, as well as the chips, on the associated
platforms.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index d967603dade8f20ab4bbdbde2b808a615ee78646..8f82e8ab1875d9819a9be24317d733a910aa352e 100644 (file)
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -20,6 +20,26 @@
        };
 };
 
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               label = "bmc";
+       };
+};
+
+&spi1 {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               label = "pnor";
+       };
+};
+
+&spi2 {
+       status = "okay";
+};
+
 &uart5 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index 1d2fc1e1dc291547bdbbe94cde3a1bf524aac3c8..aab1889f702fe38e2b56a0d37e3f0eece9587f8c 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -31,6 +31,22 @@
        };
 };
 
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               label = "bmc";
+       };
+};
+
+&spi {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               label = "pnor";
+       };
+};
+
 &uart5 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 0b4932cc02a8d8bb66165e40c11113647b92633f..7ef6442d0adeb102eee22b453f9206f65d89deeb 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -33,6 +33,35 @@
                #size-cells = <1>;
                ranges;
 
+               fmc: flash-controller@1e620000 {
+                       reg = < 0x1e620000 0x94
+                               0x20000000 0x02000000 >;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "aspeed,ast2400-fmc";
+                       status = "disabled";
+                       interrupts = <19>;
+                       flash@0 {
+                               reg = < 0 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+               };
+
+               spi: flash-controller@1e630000 {
+                       reg = < 0x1e630000 0x18
+                               0x30000000 0x02000000 >;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "aspeed,ast2400-spi";
+                       status = "disabled";
+                       flash@0 {
+                               reg = < 0 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+               };
+
                vic: interrupt-controller@1e6c0080 {
                        compatible = "aspeed,ast2400-vic";
                        interrupt-controller;

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index b664fe380936390a6f1ecdee49f157763e858513..8970f3cb8e2b78d101e788652343a01e82621004 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -24,6 +24,69 @@
                #size-cells = <1>;
                ranges;
 
+               fmc: flash-controller@1e620000 {
+                       reg = < 0x1e620000 0xc4
+                               0x20000000 0x10000000 >;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "aspeed,ast2500-fmc";
+                       status = "disabled";
+                       interrupts = <19>;
+                       flash@0 {
+                               reg = < 0 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+                       flash@1 {
+                               reg = < 1 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+                       flash@2 {
+                               reg = < 2 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+               };
+
+               spi1: flash-controller@1e630000 {
+                       reg = < 0x1e630000 0xc4
+                               0x30000000 0x08000000 >;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "aspeed,ast2500-spi";
+                       status = "disabled";
+                       flash@0 {
+                               reg = < 0 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+                       flash@1 {
+                               reg = < 1 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+               };
+
+               spi2: flash-controller@1e631000 {
+                       reg = < 0x1e631000 0xc4
+                               0x38000000 0x08000000 >;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "aspeed,ast2500-spi";
+                       status = "disabled";
+                       flash@0 {
+                               reg = < 0 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+                       flash@1 {
+                               reg = < 1 >;
+                               compatible = "jedec,spi-nor";
+                               status = "disabled";
+                       };
+               };
+
                vic: interrupt-controller@1e6c0080 {
                        compatible = "aspeed,ast2400-vic";
                        interrupt-controller;