MIPS: Loongson 3: Add serial port support

Loongson family machines has three types of serial port: PCI UART, LPC
UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based
machines use PCI UART; most Loongson-2F based machines use LPC UART;
Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART.

Port address of UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.

Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Hongliang Tao <taohl@lemote.com>
Signed-off-by: Hua Yan <yanh@lemote.com>
Tested-by: Alex Smith <alex.smith@imgtec.com>
Reviewed-by: Alex Smith <alex.smith@imgtec.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/6635
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c
index 5f2b78ae97ccb574123827e7c24e999a09a741aa..bd2b7095b6dce30087c3a629a400b4108ff8404e 100644 (file)
--- a/arch/mips/loongson/common/serial.c
+++ b/arch/mips/loongson/common/serial.c
@@ -19,19 +19,19 @@
 #include <loongson.h>
 #include <machine.h>
 
-#define PORT(int)                      \
+#define PORT(int, clk)                 \
 {                                                              \
        .irq            = int,                                  \
-       .uartclk        = 1843200,                              \
+       .uartclk        = clk,                                  \
        .iotype         = UPIO_PORT,                            \
        .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,    \
        .regshift       = 0,                                    \
 }
 
-#define PORT_M(int)                            \
+#define PORT_M(int, clk)                               \
 {                                                              \
        .irq            = MIPS_CPU_IRQ_BASE + (int),            \
-       .uartclk        = 3686400,                              \
+       .uartclk        = clk,                                  \
        .iotype         = UPIO_MEM,                             \
        .membase        = (void __iomem *)NULL,                 \
        .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,    \
@@ -40,13 +40,17 @@
 
 static struct plat_serial8250_port uart8250_data[][2] = {
        [MACH_LOONGSON_UNKNOWN]         {},
-       [MACH_LEMOTE_FL2E]              {PORT(4), {} },
-       [MACH_LEMOTE_FL2F]              {PORT(3), {} },
-       [MACH_LEMOTE_ML2F7]             {PORT_M(3), {} },
-       [MACH_LEMOTE_YL2F89]            {PORT_M(3), {} },
-       [MACH_DEXXON_GDIUM2F10]         {PORT_M(3), {} },
-       [MACH_LEMOTE_NAS]               {PORT_M(3), {} },
-       [MACH_LEMOTE_LL2F]              {PORT(3), {} },
+       [MACH_LEMOTE_FL2E]              {PORT(4, 1843200), {} },
+       [MACH_LEMOTE_FL2F]              {PORT(3, 1843200), {} },
+       [MACH_LEMOTE_ML2F7]             {PORT_M(3, 3686400), {} },
+       [MACH_LEMOTE_YL2F89]            {PORT_M(3, 3686400), {} },
+       [MACH_DEXXON_GDIUM2F10]         {PORT_M(3, 3686400), {} },
+       [MACH_LEMOTE_NAS]               {PORT_M(3, 3686400), {} },
+       [MACH_LEMOTE_LL2F]              {PORT(3, 1843200), {} },
+       [MACH_LEMOTE_A1004]             {PORT_M(2, 33177600), {} },
+       [MACH_LEMOTE_A1101]             {PORT_M(2, 25000000), {} },
+       [MACH_LEMOTE_A1201]             {PORT_M(2, 25000000), {} },
+       [MACH_LEMOTE_A1205]             {PORT_M(2, 25000000), {} },
        [MACH_LOONGSON_END]             {},
 };
 

diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c
index e192ad021edc56cba24b8a90e0be2796fedcce84..1e1eeea73fde7d79eb32e9cc983f63eec4053e49 100644 (file)
--- a/arch/mips/loongson/common/uart_base.c
+++ b/arch/mips/loongson/common/uart_base.c
@@ -35,9 +35,16 @@ void prom_init_loongson_uart_base(void)
        case MACH_DEXXON_GDIUM2F10:
        case MACH_LEMOTE_NAS:
        default:
-               /* The CPU provided serial port */
+               /* The CPU provided serial port (LPC) */
                loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8;
                break;
+       case MACH_LEMOTE_A1004:
+       case MACH_LEMOTE_A1101:
+       case MACH_LEMOTE_A1201:
+       case MACH_LEMOTE_A1205:
+               /* The CPU provided serial port (CPU) */
+               loongson_uart_base = LOONGSON_REG_BASE + 0x1e0;
+               break;
        }
 
        _loongson_uart_base =