Merge branch 'linus' into x86/cpu, to resolve conflicts

Conflicts:
	tools/power/x86/turbostat/turbostat.c

Recent turbostat changes conflicted with a pending rename of x86 model names in tip:x86/cpu,
sort it out.

Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --cc arch/x86/events/intel/core.c
Simple merge

diff --cc arch/x86/kernel/apic/apic.c
Simple merge

diff --cc tools/power/x86/turbostat/turbostat.c
index 6eef0cee6d752e990e1df243c9981f2e64d6d87a,b2a86438f074ac25ec14f7cb57ff3d4f45f416aa..5d0fddda842c46e88493af6cbf91721a64d617e8
--- 1/tools/power/x86/turbostat/turbostat.c
--- 2/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@@ -3207,14 -3234,15 +3234,15 @@@ int probe_nhm_msrs(unsigned int family
                pkg_cstate_limits = snb_pkg_cstate_limits;
                has_misc_feature_control = 1;
                break;
 -      case INTEL_FAM6_HASWELL_CORE:   /* HSW */
 +      case INTEL_FAM6_HASWELL:        /* HSW */
-       case INTEL_FAM6_HASWELL_X:      /* HSX */
 +      case INTEL_FAM6_HASWELL_G:      /* HSW */
+       case INTEL_FAM6_HASWELL_X:      /* HSX */
 -      case INTEL_FAM6_HASWELL_ULT:    /* HSW */
 -      case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
 -      case INTEL_FAM6_BROADWELL_CORE: /* BDW */
 -      case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
++      case INTEL_FAM6_HASWELL_L:      /* HSW */
 +      case INTEL_FAM6_BROADWELL:      /* BDW */
 +      case INTEL_FAM6_BROADWELL_G:    /* BDW */
        case INTEL_FAM6_BROADWELL_X:    /* BDX */
 -      case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
 -      case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
 +      case INTEL_FAM6_SKYLAKE_L:      /* SKL */
 +      case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
                pkg_cstate_limits = hsw_pkg_cstate_limits;
                has_misc_feature_control = 1;
                break;
@@@ -3403,14 -3431,15 +3431,15 @@@ int has_config_tdp(unsigned int family
  
        switch (model) {
        case INTEL_FAM6_IVYBRIDGE:      /* IVB */
 -      case INTEL_FAM6_HASWELL_CORE:   /* HSW */
 +      case INTEL_FAM6_HASWELL:        /* HSW */
        case INTEL_FAM6_HASWELL_X:      /* HSX */
 -      case INTEL_FAM6_HASWELL_ULT:    /* HSW */
 -      case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
 -      case INTEL_FAM6_BROADWELL_CORE: /* BDW */
 -      case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
++      case INTEL_FAM6_HASWELL_L:      /* HSW */
 +      case INTEL_FAM6_HASWELL_G:      /* HSW */
 +      case INTEL_FAM6_BROADWELL:      /* BDW */
 +      case INTEL_FAM6_BROADWELL_G:    /* BDW */
        case INTEL_FAM6_BROADWELL_X:    /* BDX */
 -      case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
 -      case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
 +      case INTEL_FAM6_SKYLAKE_L:      /* SKL */
 +      case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
        case INTEL_FAM6_SKYLAKE_X:      /* SKX */
  
        case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
@@@ -3840,10 -3870,11 +3870,11 @@@ void rapl_probe_intel(unsigned int fami
        switch (model) {
        case INTEL_FAM6_SANDYBRIDGE:
        case INTEL_FAM6_IVYBRIDGE:
 -      case INTEL_FAM6_HASWELL_CORE:   /* HSW */
 -      case INTEL_FAM6_HASWELL_ULT:    /* HSW */
 -      case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
 -      case INTEL_FAM6_BROADWELL_CORE: /* BDW */
 -      case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
 +      case INTEL_FAM6_HASWELL:        /* HSW */
++      case INTEL_FAM6_HASWELL_L:      /* HSW */
 +      case INTEL_FAM6_HASWELL_G:      /* HSW */
 +      case INTEL_FAM6_BROADWELL:      /* BDW */
 +      case INTEL_FAM6_BROADWELL_G:    /* BDW */
                do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
                if (rapl_joules) {
                        BIC_PRESENT(BIC_Pkg_J);
@@@ -4031,8 -4063,9 +4063,9 @@@ void perf_limit_reasons_probe(unsigned 
                return;
  
        switch (model) {
 -      case INTEL_FAM6_HASWELL_CORE:   /* HSW */
 -      case INTEL_FAM6_HASWELL_ULT:    /* HSW */
 -      case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
 +      case INTEL_FAM6_HASWELL:        /* HSW */
++      case INTEL_FAM6_HASWELL_L:      /* HSW */
 +      case INTEL_FAM6_HASWELL_G:      /* HSW */
                do_gfx_perf_limit_reasons = 1;
        case INTEL_FAM6_HASWELL_X:      /* HSX */
                do_core_perf_limit_reasons = 1;
@@@ -4247,20 -4280,21 +4280,21 @@@ int has_snb_msrs(unsigned int family, u
        switch (model) {
        case INTEL_FAM6_SANDYBRIDGE:
        case INTEL_FAM6_SANDYBRIDGE_X:
--      case INTEL_FAM6_IVYBRIDGE:      /* IVB */
--      case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
-       case INTEL_FAM6_HASWELL:        /* HSW */
 -      case INTEL_FAM6_HASWELL_CORE:   /* HSW */
--      case INTEL_FAM6_HASWELL_X:      /* HSW */
-       case INTEL_FAM6_HASWELL_G:      /* HSW */
-       case INTEL_FAM6_BROADWELL:      /* BDW */
-       case INTEL_FAM6_BROADWELL_G:    /* BDW */
 -      case INTEL_FAM6_HASWELL_ULT:    /* HSW */
 -      case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
 -      case INTEL_FAM6_BROADWELL_CORE: /* BDW */
 -      case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
--      case INTEL_FAM6_BROADWELL_X:    /* BDX */
-       case INTEL_FAM6_SKYLAKE_L:      /* SKL */
-       case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
 -      case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
 -      case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
--      case INTEL_FAM6_SKYLAKE_X:      /* SKX */
--      case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
++      case INTEL_FAM6_IVYBRIDGE:              /* IVB */
++      case INTEL_FAM6_IVYBRIDGE_X:            /* IVB Xeon */
++      case INTEL_FAM6_HASWELL:                /* HSW */
++      case INTEL_FAM6_HASWELL_X:              /* HSW */
++      case INTEL_FAM6_HASWELL_L:              /* HSW */
++      case INTEL_FAM6_HASWELL_G:              /* HSW */
++      case INTEL_FAM6_BROADWELL:              /* BDW */
++      case INTEL_FAM6_BROADWELL_G:            /* BDW */
++      case INTEL_FAM6_BROADWELL_X:            /* BDX */
++      case INTEL_FAM6_SKYLAKE_L:              /* SKL */
++      case INTEL_FAM6_CANNONLAKE_L:           /* CNL */
++      case INTEL_FAM6_SKYLAKE_X:              /* SKX */
++      case INTEL_FAM6_ATOM_GOLDMONT:          /* BXT */
        case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
 -      case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
 +      case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
                return 1;
        }
        return 0;
@@@ -4284,10 -4318,10 +4318,10 @@@ int has_c8910_msrs(unsigned int family
                return 0;
  
        switch (model) {
-       case INTEL_FAM6_HASWELL:
 -      case INTEL_FAM6_HASWELL_ULT:    /* HSW */
 -      case INTEL_FAM6_BROADWELL_CORE: /* BDW */
 -      case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
 -      case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
++      case INTEL_FAM6_HASWELL_L:      /* HSW */
 +      case INTEL_FAM6_BROADWELL:      /* BDW */
 +      case INTEL_FAM6_SKYLAKE_L:      /* SKL */
 +      case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
        case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
        case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
                return 1;
@@@ -4568,21 -4602,22 +4602,22 @@@ unsigned int intel_model_duplicates(uns
        case INTEL_FAM6_XEON_PHI_KNM:
                return INTEL_FAM6_XEON_PHI_KNL;
  
-       case INTEL_FAM6_HASWELL_L:
-               return INTEL_FAM6_HASWELL;
- 
        case INTEL_FAM6_BROADWELL_X:
 -      case INTEL_FAM6_BROADWELL_XEON_D:       /* BDX-DE */
 +      case INTEL_FAM6_BROADWELL_D:    /* BDX-DE */
                return INTEL_FAM6_BROADWELL_X;
  
 -      case INTEL_FAM6_SKYLAKE_MOBILE:
 -      case INTEL_FAM6_SKYLAKE_DESKTOP:
 -      case INTEL_FAM6_KABYLAKE_MOBILE:
 -      case INTEL_FAM6_KABYLAKE_DESKTOP:
 -              return INTEL_FAM6_SKYLAKE_MOBILE;
 +      case INTEL_FAM6_SKYLAKE_L:
 +      case INTEL_FAM6_SKYLAKE:
 +      case INTEL_FAM6_KABYLAKE_L:
 +      case INTEL_FAM6_KABYLAKE:
 +              return INTEL_FAM6_SKYLAKE_L;
  
 -      case INTEL_FAM6_ICELAKE_MOBILE:
 +      case INTEL_FAM6_ICELAKE_L:
+       case INTEL_FAM6_ICELAKE_NNPI:
 -              return INTEL_FAM6_CANNONLAKE_MOBILE;
 +              return INTEL_FAM6_CANNONLAKE_L;
+ 
 -      case INTEL_FAM6_ATOM_TREMONT_X:
 -              return INTEL_FAM6_ATOM_GOLDMONT_X;
++      case INTEL_FAM6_ATOM_TREMONT_D:
++              return INTEL_FAM6_ATOM_GOLDMONT_D;
        }
        return model;
  }