{ X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 },
{ X86_FEATURE_SPEC_CTRL, CPUID_EDX, 26, 0x00000007, 0 },
{ X86_FEATURE_ARCH_CAPABILITIES,CPUID_EDX, 29, 0x00000007, 0 },
- { X86_FEATURE_SSBD, CPUID_EDX, 31, 0x00000007, 0 },
+ { X86_FEATURE_SPEC_CTRL_SSBD, CPUID_EDX, 31, 0x00000007, 0 },
{ X86_FEATURE_CAT_L3, CPUID_EBX, 1, 0x00000010, 0 },
{ X86_FEATURE_CAT_L2, CPUID_EBX, 2, 0x00000010, 0 },
{ X86_FEATURE_CDP_L3, CPUID_ECX, 2, 0x00000010, 1 },
#define KVM_CPUID_BIT_AVX512_4VNNIW 2
#define KVM_CPUID_BIT_AVX512_4FMAPS 3
#define KVM_CPUID_BIT_SPEC_CTRL 26
-#define KVM_CPUID_BIT_SSBD 31
+#define KVM_CPUID_BIT_SPEC_CTRL_SSBD 31
#define KF(x) bit(KVM_CPUID_BIT_##x)
int kvm_update_cpuid(struct kvm_vcpu *vcpu)
/* cpuid 7.0.edx*/
const u32 kvm_cpuid_7_0_edx_x86_features =
KF(AVX512_4VNNIW) | KF(AVX512_4FMAPS) |
- KF(SPEC_CTRL) | KF(SSBD);
+ KF(SPEC_CTRL) | KF(SPEC_CTRL_SSBD);
/* cpuid 0x80000008.0.ebx */
const u32 kvm_cpuid_80000008_0_ebx_x86_features =