]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commitdiff
arm64: dts: hi3660: Add dma to uart nodes
authorJohn Stultz <john.stultz@linaro.org>
Thu, 4 Apr 2019 08:16:26 +0000 (01:16 -0700)
committerWei Xu <xuwei5@hisilicon.com>
Mon, 8 Apr 2019 15:30:44 +0000 (16:30 +0100)
Try to add DMA support to the uart nodes following
the assignments made in the dts from the victoria vendor kernel
here:
https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1

Cc: Tanglei Han <hantanglei@huawei.com>
Cc: Zhuangluan Su <suzhuangluan@hisilicon.com>
Cc: Ryan Grachek <ryan@edited.us>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hi3660.dtsi

index 2f19e0e5b7cfc4feecc4ae67ed0d1755b31a017e..a3eeab1e1283a860a889781d5dd77b74f3261c1c 100644 (file)
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfdf00000 0x0 0x1000>;
                        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-names = "rx", "tx";
+                       dmas =  <&dma0 2 &dma0 3>;
                        clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
                                 <&crg_ctrl HI3660_CLK_GATE_UART1>;
                        clock-names = "uartclk", "apb_pclk";
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfdf03000 0x0 0x1000>;
                        interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-names = "rx", "tx";
+                       dmas =  <&dma0 4 &dma0 5>;
                        clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
                                 <&crg_ctrl HI3660_PCLK>;
                        clock-names = "uartclk", "apb_pclk";
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfdf01000 0x0 0x1000>;
                        interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-names = "rx", "tx";
+                       dmas =  <&dma0 6 &dma0 7>;
                        clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>,
                                 <&crg_ctrl HI3660_CLK_GATE_UART4>;
                        clock-names = "uartclk", "apb_pclk";
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfdf05000 0x0 0x1000>;
                        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-names = "rx", "tx";
+                       dmas =  <&dma0 8 &dma0 9>;
                        clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
                                 <&crg_ctrl HI3660_CLK_GATE_UART5>;
                        clock-names = "uartclk", "apb_pclk";