static bool trans_fld(DisasContext *ctx, arg_fld *a)
{
+ TCGv addr;
+
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
- tcg_gen_addi_tl(t0, t0, a->imm);
- tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], t0, ctx->mem_idx, MO_TEQ);
+ addr = get_gpr(ctx, a->rs1, EXT_NONE);
+ if (a->imm) {
+ TCGv temp = temp_new(ctx);
+ tcg_gen_addi_tl(temp, addr, a->imm);
+ addr = temp;
+ }
+
+ tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], addr, ctx->mem_idx, MO_TEQ);
mark_fs_dirty(ctx);
- tcg_temp_free(t0);
return true;
}
static bool trans_fsd(DisasContext *ctx, arg_fsd *a)
{
+ TCGv addr;
+
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
- tcg_gen_addi_tl(t0, t0, a->imm);
- tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEQ);
+ addr = get_gpr(ctx, a->rs1, EXT_NONE);
+ if (a->imm) {
+ TCGv temp = temp_new(ctx);
+ tcg_gen_addi_tl(temp, addr, a->imm);
+ addr = temp;
+ }
+
+ tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, MO_TEQ);
- tcg_temp_free(t0);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_helper_feq_d(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ TCGv dest = dest_gpr(ctx, a->rd);
+ gen_helper_feq_d(dest, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_helper_flt_d(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ TCGv dest = dest_gpr(ctx, a->rd);
+ gen_helper_flt_d(dest, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_helper_fle_d(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ TCGv dest = dest_gpr(ctx, a->rd);
+ gen_helper_fle_d(dest, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_helper_fclass_d(t0, cpu_fpr[a->rs1]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ TCGv dest = dest_gpr(ctx, a->rd);
+
+ gen_helper_fclass_d(dest, cpu_fpr[a->rs1]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_w_d(t0, cpu_env, cpu_fpr[a->rs1]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ TCGv dest = dest_gpr(ctx, a->rd);
+ gen_set_rm(ctx, a->rm);
+ gen_helper_fcvt_w_d(dest, cpu_env, cpu_fpr[a->rs1]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_wu_d(t0, cpu_env, cpu_fpr[a->rs1]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ TCGv dest = dest_gpr(ctx, a->rd);
+ gen_set_rm(ctx, a->rm);
+ gen_helper_fcvt_wu_d(dest, cpu_env, cpu_fpr[a->rs1]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
+ TCGv src = get_gpr(ctx, a->rs1, EXT_SIGN);
gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_d_w(cpu_fpr[a->rd], cpu_env, t0);
- tcg_temp_free(t0);
+ gen_helper_fcvt_d_w(cpu_fpr[a->rd], cpu_env, src);
mark_fs_dirty(ctx);
return true;
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
+ TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);
gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_d_wu(cpu_fpr[a->rd], cpu_env, t0);
- tcg_temp_free(t0);
+ gen_helper_fcvt_d_wu(cpu_fpr[a->rd], cpu_env, src);
mark_fs_dirty(ctx);
return true;
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
+ TCGv dest = dest_gpr(ctx, a->rd);
+
gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_l_d(t0, cpu_env, cpu_fpr[a->rs1]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ gen_helper_fcvt_l_d(dest, cpu_env, cpu_fpr[a->rs1]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
+ TCGv dest = dest_gpr(ctx, a->rd);
+
gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_lu_d(t0, cpu_env, cpu_fpr[a->rs1]);
- gen_set_gpr(ctx, a->rd, t0);
- tcg_temp_free(t0);
+ gen_helper_fcvt_lu_d(dest, cpu_env, cpu_fpr[a->rs1]);
+ gen_set_gpr(ctx, a->rd, dest);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
+ TCGv src = get_gpr(ctx, a->rs1, EXT_SIGN);
gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_d_l(cpu_fpr[a->rd], cpu_env, t0);
- tcg_temp_free(t0);
+ gen_helper_fcvt_d_l(cpu_fpr[a->rd], cpu_env, src);
+
mark_fs_dirty(ctx);
return true;
}
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
+ TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);
gen_set_rm(ctx, a->rm);
- gen_helper_fcvt_d_lu(cpu_fpr[a->rd], cpu_env, t0);
- tcg_temp_free(t0);
+ gen_helper_fcvt_d_lu(cpu_fpr[a->rd], cpu_env, src);
+
mark_fs_dirty(ctx);
return true;
}
REQUIRE_EXT(ctx, RVD);
#ifdef TARGET_RISCV64
- TCGv t0 = tcg_temp_new();
- gen_get_gpr(ctx, t0, a->rs1);
-
- tcg_gen_mov_tl(cpu_fpr[a->rd], t0);
- tcg_temp_free(t0);
+ tcg_gen_mov_tl(cpu_fpr[a->rd], get_gpr(ctx, a->rs1, EXT_NONE));
mark_fs_dirty(ctx);
return true;
#else