PCI: pci-bridge-emul: Set PCI_STATUS_CAP_LIST for PCIe device

BugLink: https://bugs.launchpad.net/bugs/1959376
commit 3be9d243b21724d49b65043d4520d688b6040b36 upstream.

Since all PCI Express device Functions are required to implement the PCI
Express Capability structure, Capabilities List bit in PCI Status Register
must be hardwired to 1b. Capabilities Pointer register (which is already
set by pci-bride-emul.c driver) is valid only when Capabilities List is set
to 1b.

Link: https://lore.kernel.org/r/20211124155944.1290-7-pali@kernel.org
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com>

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 867159562d0780e61deffb73ceac363146448978..37504c2cce9b89165da60b384b895e19ab89aa56 100644 (file)
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -296,6 +296,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
 
        if (bridge->has_pcie) {
                bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
+               bridge->conf.status |= cpu_to_le16(PCI_STATUS_CAP_LIST);
                bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
                bridge->pcie_conf.cap |= cpu_to_le16(PCI_EXP_TYPE_ROOT_PORT << 4);
                bridge->pcie_cap_regs_behavior =