drm/amd/display: fix dml prefetch validation

BugLink: https://bugs.launchpad.net/bugs/1928857
[ Upstream commit 8ee0fea4baf90e43efe2275de208a7809f9985bc ]

Incorrect variable used, missing initialization during validation.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 45f028986a8dbfe0fb4d4ad2b4b24d8dc757958c..b3f0476899d32ff2a65da4a74e9225ce65df4f52 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -3437,6 +3437,7 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
                        mode_lib->vba.DCCEnabledInAnyPlane = true;
                }
        }
+       mode_lib->vba.UrgentLatency = mode_lib->vba.UrgentLatencyPixelDataOnly;
        for (i = 0; i <= mode_lib->vba.soc.num_states; i++) {
                locals->FabricAndDRAMBandwidthPerState[i] = dml_min(
                                mode_lib->vba.DRAMSpeedPerState[i] * mode_lib->vba.NumberOfChannels

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 80170f9721ce949330d72408b81c48575af13101..1bcda7eba4a6fc74309f334f24889fee143c5f7d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -3510,6 +3510,7 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode
                        mode_lib->vba.DCCEnabledInAnyPlane = true;
                }
        }
+       mode_lib->vba.UrgentLatency = mode_lib->vba.UrgentLatencyPixelDataOnly;
        for (i = 0; i <= mode_lib->vba.soc.num_states; i++) {
                locals->FabricAndDRAMBandwidthPerState[i] = dml_min(
                                mode_lib->vba.DRAMSpeedPerState[i] * mode_lib->vba.NumberOfChannels