The VECTPENDING field in the ICSR is 9 bits wide, in bits [20:12] of
the register. We were incorrectly masking it to 8 bits, so it would
report the wrong value if the pending exception was greater than 256.
Fix the bug.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210723162146.5167-6-peter.maydell@linaro.org
/* VECTACTIVE */
val = cpu->env.v7m.exception;
/* VECTPENDING */
- val |= (s->vectpending & 0xff) << 12;
+ val |= (s->vectpending & 0x1ff) << 12;
/* ISRPENDING - set if any external IRQ is pending */
if (nvic_isrpending(s)) {
val |= (1 << 22);