drm/msm/disp/mdp5: mdp5_cfg: Fix msm8974v2 max_clk

The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
index df10c1ac7591a56b91de2745c541430fee0b7136..94ce62a26daf57381e737a8704d8636842f71b8c 100644 (file)
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
@@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = {
                        [3] = INTF_HDMI,
                },
        },
-       .max_clk = 200000000,
+       .max_clk = 320000000,
 };
 
 static const struct mdp5_cfg_hw apq8084_config = {