powerpc/64s/pseries: radix flush translations before MMU is enabled at boot

Radix guests are responsible for managing their own translation caches,
so make them match bare metal radix and hash, and make each CPU flush
all its translations right before enabling its MMU.

Radix guests may not flush partition scope translations, so in
tlbiel_all, make these flushes conditional on CPU_FTR_HVMODE. Process
scope translations are the only type visible to the guest.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190902152931.17840-5-npiggin@gmail.com

diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
index 078a7eeec1f56b7d53c1c994530b31e7be6e5d7b..e1e711c4704a3f4ae98f4ff2b09262bf314a8c45 100644 (file)
--- a/arch/powerpc/mm/book3s64/radix_pgtable.c
+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
@@ -616,8 +616,7 @@ void __init radix__early_init_mmu(void)
 
        /* Switch to the guard PID before turning on MMU */
        radix__switch_mmu_context(NULL, &init_mm);
-       if (cpu_has_feature(CPU_FTR_HVMODE))
-               tlbiel_all();
+       tlbiel_all();
 }
 
 void radix__early_init_mmu_secondary(void)
@@ -637,8 +636,7 @@ void radix__early_init_mmu_secondary(void)
        }
 
        radix__switch_mmu_context(NULL, &init_mm);
-       if (cpu_has_feature(CPU_FTR_HVMODE))
-               tlbiel_all();
+       tlbiel_all();
 }
 
 void radix__mmu_cleanup_all(void)

diff --git a/arch/powerpc/mm/book3s64/radix_tlb.c b/arch/powerpc/mm/book3s64/radix_tlb.c
index 082f90d068ee4d89e7793d3b3a139f344e99de8c..f9cf8ae598313341a1ce6546a0a9e7ec2bcb28ea 100644 (file)
--- a/arch/powerpc/mm/book3s64/radix_tlb.c
+++ b/arch/powerpc/mm/book3s64/radix_tlb.c
@@ -51,11 +51,15 @@ static void tlbiel_all_isa300(unsigned int num_sets, unsigned int is)
         * and partition table entries. Then flush the remaining sets of the
         * TLB.
         */
-       tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 0);
-       for (set = 1; set < num_sets; set++)
-               tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 0);
 
-       /* Do the same for process scoped entries. */
+       if (early_cpu_has_feature(CPU_FTR_HVMODE)) {
+               /* MSR[HV] should flush partition scope translations first. */
+               tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 0);
+               for (set = 1; set < num_sets; set++)
+                       tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 0);
+       }
+
+       /* Flush process scoped entries. */
        tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 1);
        for (set = 1; set < num_sets; set++)
                tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 1);