drm/amd/display: call set csc_default if enable adjustment is false

Fixes a greenish tint on RV displays.

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[drake@endlessm.com: backport to 4.15]
Signed-off-by: Daniel Drake <drake@endlessm.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
index a9782b1aba478c202df3ab70e824db04e4ae1003..34daf895f848e848699b1a33668e4f7f79f3207b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
@@ -1360,7 +1360,7 @@ void dpp1_cm_set_output_csc_adjustment(
 
 void dpp1_cm_set_output_csc_default(
                struct dpp *dpp_base,
-               const struct default_adjustment *default_adjust);
+               enum dc_color_space colorspace);
 
 void dpp1_cm_set_gamut_remap(
        struct dpp *dpp,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
index 40627c244bf5bc49b3615cdc9e7cd3605029bb43..ed1216b53465db99eb3389611b2892350e509123 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
@@ -225,14 +225,13 @@ void dpp1_cm_set_gamut_remap(
 
 void dpp1_cm_set_output_csc_default(
                struct dpp *dpp_base,
-               const struct default_adjustment *default_adjust)
+               enum dc_color_space colorspace)
 {
 
        struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);
        uint32_t ocsc_mode = 0;
 
-       if (default_adjust != NULL) {
-               switch (default_adjust->out_color_space) {
+       switch (colorspace) {
                case COLOR_SPACE_SRGB:
                case COLOR_SPACE_2020_RGB_FULLRANGE:
                        ocsc_mode = 0;
@@ -253,7 +252,6 @@ void dpp1_cm_set_output_csc_default(
                case COLOR_SPACE_UNKNOWN:
                default:
                        break;
-               }
        }
 
        REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 961ad5c3b45412062e85255074cc374e9fe21763..05dc01e54531755ebcc9034d42810b2c68537364 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2097,6 +2097,8 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx,
                        tbl_entry.color_space = color_space;
                        //tbl_entry.regval = matrix;
                        pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry);
+       } else {
+               pipe_ctx->plane_res.dpp->funcs->opp_set_csc_default(pipe_ctx->plane_res.dpp, colorspace);
        }
 }
 static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx)

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
index 83a68460edcda8372a5474f6ea0e95697f84679e..9420dfb94d39ef5da48d7718236863945cfa9448 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
@@ -64,7 +64,7 @@ struct dpp_funcs {
 
        void (*opp_set_csc_default)(
                struct dpp *dpp,
-               const struct default_adjustment *default_adjust);
+               enum dc_color_space colorspace);
 
        void (*opp_set_csc_adjustment)(
                struct dpp *dpp,