coresight: etm4x: Add kernel configuration for CONTEXTID

Set the proper bit in the configuration register when contextID tracing
has been requested by user space.  That way PE_CONTEXT elements are
generated by the tracers when a process is installed on a CPU.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index a40d796f0a4b4ecc21ac8c1d54f461a8888d1543..18e8d03321d609170708ae7f76877f03af318fe8 100644 (file)
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -75,6 +75,7 @@ config CORESIGHT_SOURCE_ETM4X
        bool "CoreSight Embedded Trace Macrocell 4.x driver"
        depends on ARM64
        select CORESIGHT_LINKS_AND_SINKS
+       select PID_IN_CONTEXTIDR
        help
          This driver provides support for the ETM4.x tracer module, tracing the
          instructions that a processor is executing. This is primarily useful

diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 25ae56e924bb2b411e0a7ba0c0a5ea8e4884b1cd..bbfed70b34024effe0032ced3fbf2dd6d70570fe 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -29,6 +29,7 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
 
 /* ETMv3.5/PTM's ETMCR is 'config' */
 PMU_FORMAT_ATTR(cycacc,                "config:" __stringify(ETM_OPT_CYCACC));
+PMU_FORMAT_ATTR(contextid,     "config:" __stringify(ETM_OPT_CTXTID));
 PMU_FORMAT_ATTR(timestamp,     "config:" __stringify(ETM_OPT_TS));
 PMU_FORMAT_ATTR(retstack,      "config:" __stringify(ETM_OPT_RETSTK));
 /* Sink ID - same for all ETMs */
@@ -36,6 +37,7 @@ PMU_FORMAT_ATTR(sinkid,               "config2:0-31");
 
 static struct attribute *etm_config_formats_attr[] = {
        &format_attr_cycacc.attr,
+       &format_attr_contextid.attr,
        &format_attr_timestamp.attr,
        &format_attr_retstack.attr,
        &format_attr_sinkid.attr,

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 08ce37c9475da79a3d12345a5880fa0f08fc054d..732ae12fca9b6fe89b31298e8d45ddeae7952636 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -239,6 +239,11 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,
        if (attr->config & BIT(ETM_OPT_TS))
                /* bit[11], Global timestamp tracing bit */
                config->cfg |= BIT(11);
+
+       if (attr->config & BIT(ETM_OPT_CTXTID))
+               /* bit[6], Context ID tracing bit */
+               config->cfg |= BIT(ETM4_CFG_BIT_CTXTID);
+
        /* return stack - enable if selected and supported */
        if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack)
                /* bit[12], Return stack enable bit */

diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h
index a1a959ba24ffada75e13de61aa570490a988c8d4..b0e35eec6499bf4367da462c1f180c77821336e2 100644 (file)
--- a/include/linux/coresight-pmu.h
+++ b/include/linux/coresight-pmu.h
@@ -12,11 +12,13 @@
 
 /* ETMv3.5/PTM's ETMCR config bit */
 #define ETM_OPT_CYCACC  12
+#define ETM_OPT_CTXTID 14
 #define ETM_OPT_TS      28
 #define ETM_OPT_RETSTK 29
 
 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
 #define ETM4_CFG_BIT_CYCACC    4
+#define ETM4_CFG_BIT_CTXTID    6
 #define ETM4_CFG_BIT_TS                11
 #define ETM4_CFG_BIT_RETSTK    12
 

diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h
index a1a959ba24ffada75e13de61aa570490a988c8d4..b0e35eec6499bf4367da462c1f180c77821336e2 100644 (file)
--- a/tools/include/linux/coresight-pmu.h
+++ b/tools/include/linux/coresight-pmu.h
@@ -12,11 +12,13 @@
 
 /* ETMv3.5/PTM's ETMCR config bit */
 #define ETM_OPT_CYCACC  12
+#define ETM_OPT_CTXTID 14
 #define ETM_OPT_TS      28
 #define ETM_OPT_RETSTK 29
 
 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
 #define ETM4_CFG_BIT_CYCACC    4
+#define ETM4_CFG_BIT_CTXTID    6
 #define ETM4_CFG_BIT_TS                11
 #define ETM4_CFG_BIT_RETSTK    12