wil6210: interrupt moderation

Use hardware capabilities to limit IRQ generation to about 15 per msec
It corresponds to about 7 packets/IRQ when running iperf with default
parameters at 1.3Gbps

Do not enable this feature in the sniffer (monitor)  mode, because
interrupt moderation cause timestamp accuracy deterioration.
For the sniffer flow, it is important to get precise timestamp.

Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/wil6210/interrupt.c b/drivers/net/wireless/ath/wil6210/interrupt.c
index 8205d3e4ab66613134ca4b6dff022a9995eb0e24..10919f95a83c19cd744003a2a49022ecda3b2a8c 100644 (file)
--- a/drivers/net/wireless/ath/wil6210/interrupt.c
+++ b/drivers/net/wireless/ath/wil6210/interrupt.c
@@ -156,6 +156,19 @@ void wil6210_enable_irq(struct wil6210_priv *wil)
        iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_MISC_ICR) +
                  offsetof(struct RGF_ICR, ICC));
 
+       /* interrupt moderation parameters */
+       if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
+               /* disable interrupt moderation for monitor
+                * to get better timestamp precision
+                */
+               iowrite32(0, wil->csr + HOSTADDR(RGF_DMA_ITR_CNT_CRL));
+       } else {
+               iowrite32(WIL6210_ITR_TRSH,
+                         wil->csr + HOSTADDR(RGF_DMA_ITR_CNT_TRSH));
+               iowrite32(BIT_DMA_ITR_CNT_CRL_EN,
+                         wil->csr + HOSTADDR(RGF_DMA_ITR_CNT_CRL));
+       }
+
        wil6210_unmask_irq_pseudo(wil);
        wil6210_unmask_irq_tx(wil);
        wil6210_unmask_irq_rx(wil);

diff --git a/drivers/net/wireless/ath/wil6210/wil6210.h b/drivers/net/wireless/ath/wil6210/wil6210.h
index c4a51638736a27ab4a41ffe1e3e5026400e4e249..1f91eaf95bbebd0dfd70d316943558c5882ed54d 100644 (file)
--- a/drivers/net/wireless/ath/wil6210/wil6210.h
+++ b/drivers/net/wireless/ath/wil6210/wil6210.h
@@ -39,6 +39,7 @@ static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
 #define WIL6210_MAX_TX_RINGS   (24) /* HW limit */
 #define WIL6210_MAX_CID                (8) /* HW limit */
 #define WIL6210_NAPI_BUDGET    (16) /* arbitrary */
+#define WIL6210_ITR_TRSH       (10000) /* arbitrary - about 15 IRQs/msec */
 
 /* Hardware definitions begin */